|
|
|
|
| Synopsis |
|
| module Control.Monad | | | data Signal | | | class CellLibrary lib | | | data Lava lib a | | | class (Monad m, CellLibrary lib) => MonadLava lib m | m -> lib where | | | | type InterpDesignDB lib x = (DesignDB lib, Map Signal x) | | | lookupTag :: Tag -> InterpDesignDB lib x -> [x] | | | hasLoop :: MonadLava lib m => m a -> Bool | | | hasCombLoop :: MonadLava lib m => m a -> Bool | | | class Port p s | p -> s | | | class Port p s => PortStruct p s t | p -> s t, s t -> p | | | class Port p s => PortFixed p s | p -> s | | | input :: forall lib m p. (MonadLava lib m, PortFixed p Signal) => m p | | | inputList :: (MonadLava lib m, PortFixed p Signal) => Int -> m [p] | | | label :: (MonadLava lib m, PortStruct p Signal t) => Tag -> p -> m p | | | toLava2000 :: (MonadLava lib m, PortStruct pli (Signal Bool) ti, PortStruct psi Signal ti, PortStruct pso Signal to, PortStruct plo (Signal Bool) to) => (psi -> m pso) -> pli -> plo | | | simulateSeq :: (MonadLava lib m, PortStruct pni Int ti, PortStruct psi Signal ti, PortStruct pso Signal to, PortStruct pno Int to) => (psi -> m pso) -> [pni] -> [pno] | | | simulate :: (MonadLava lib m, PortStruct pni Int ti, PortStruct psi Signal ti, PortStruct pso Signal to, PortStruct pno Int to) => (psi -> m pso) -> pni -> pno | | | encodeBin :: Int -> Int -> [Int] | | | decodeBin :: [Int] -> Int | | | verify :: forall lib m ps. (MonadLava lib m, PortFixed ps Signal) => (ps -> m Signal) -> IO () | | | depth :: (MonadLava lib m, PortStruct ps Signal t, PortStruct pd Int t) => m ps -> (pd, InterpDesignDB lib Int) | | | fanout :: MonadLava lib m => m a -> InterpDesignDB lib Int | | | size :: MonadLava lib m => m p -> Int |
|
|
| Documentation |
|
| module Control.Monad |
|
|
| Identifies a driver in the circuit. A driver is either a primary input or
an output pin of a cell.
|  Instances | |
|
|
|
| | Instances | |
|
|
|
| Instances | |
|
|
|
| | Methods | | | | Instances | |
|
|
|
|
|
|
|
|
|
|
|
| | Instances | | Port Bool Bool | | Port Int Int | | Port () () | | Port Time Time | | Port Signal Signal | | Port p s => Port ([] p) s | | Port p s => Port (Maybe p) s | | Port (Signal Bool) (Signal Bool) | | (Port p1 s, Port p2 s) => Port (Either p1 p2) s | | (Port p1 s, Port p2 s) => Port ((,) p1 p2) s | | (Port p1 s, Port p2 s, Port p3 s) => Port ((,,) p1 p2 p3) s | | (Port p1 s, Port p2 s, Port p3 s, Port p4 s) => Port ((,,,) p1 p2 p3 p4) s |
|
|
|
| class Port p s => PortStruct p s t | p -> s t, s t -> p | Source |
|
| | Instances | | PortStruct Bool Bool () | | PortStruct Bool Bool () | | PortStruct Int Int () | | PortStruct Int Int () | | PortStruct () () () | | PortStruct Time Time () | | PortStruct Time Time () | | PortStruct Signal Signal () | | PortStruct Signal Signal () | | PortStruct p s t => PortStruct ([] p) s ([] t) | | PortStruct p s t => PortStruct (Maybe p) s (Maybe t) | | PortStruct (Signal Bool) (Signal Bool) () | | PortStruct (Signal Bool) (Signal Bool) () | | (PortStruct p1 s t1, PortStruct p2 s t2) => PortStruct (Either p1 p2) s (Either t1 t2) | | (PortStruct p1 s t1, PortStruct p2 s t2) => PortStruct ((,) p1 p2) s ((,) t1 t2) | | (PortStruct p1 s t1, PortStruct p2 s t2, PortStruct p3 s t3) => PortStruct ((,,) p1 p2 p3) s ((,,) t1 t2 t3) | | (PortStruct p1 s t1, PortStruct p2 s t2, PortStruct p3 s t3, PortStruct p4 s t4) => PortStruct ((,,,) p1 p2 p3 p4) s ((,,,) t1 t2 t3 t4) |
|
|
|
|
| | Instances | | PortFixed Signal Signal | | (PortFixed p1 s, PortFixed p2 s) => PortFixed ((,) p1 p2) s | | (PortFixed p1 s, PortFixed p2 s, PortFixed p3 s) => PortFixed ((,,) p1 p2 p3) s | | (PortFixed p1 s, PortFixed p2 s, PortFixed p3 s, PortFixed p4 s) => PortFixed ((,,,) p1 p2 p3 p4) s |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
encodeBin n x Encodes the number x as a binary number of length n. The resulting list
contains only zeroes and ones.
|
|
|
|
|
|
|
|
|
|
|
|
| Produced by Haddock version 2.4.2 |
