[ { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.head"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "head :: Vec (n + 1) a -> a"
    , "template"  : "~FROMBV[~VAR[vec][0][\\~SIZE[~TYP[0]]-1 -: ~SIZE[~TYPO]\\]][~TYPO]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.tail"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "tail :: Vec (n + 1) a -> Vec n a"
    , "template"  : "~VAR[vec][0][~SIZE[~TYPO]-1 : 0]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.last"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "Vec (n + 1) a -> a"
    , "template"  : "~FROMBV[~VAR[vec][0][\\~SIZE[~TYPO]-1:0\\]][~TYPO]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.init"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "Vec (n + 1) a -> Vec n a"
    , "template"  : "~VAR[vec][0][~SIZE[~TYP[0]]-1 : ~SIZE[~TYPEL[~TYP[0]]]]"
    }
  }
, { "BlackBox" :
    { "name" : "Clash.Sized.Vector.select"
    , "workInfo"  : "Never"
    , "kind" : "Declaration"
    , "type" :
"select :: (CmpNat (i + s) (s * n) ~ GT) -- ARG[0]
        => SNat f                        -- ARG[1]
        -> SNat s                        -- ARG[2]
        -> SNat n                        -- ARG[3]
        -> Vec i a                       -- ARG[4]
        -> Vec n a"
    , "template" :
"// select begin
wire ~TYPEL[~TYPO] ~SYM[1] [0:~LENGTH[~TYP[4]]-1];
genvar ~GENSYM[i][2];
~GENERATE
for (~SYM[2]=0; ~SYM[2] < ~LENGTH[~TYP[4]]; ~SYM[2]=~SYM[2]+1) begin : ~GENSYM[mk_array][3]
  assign ~SYM[1][(~LENGTH[~TYP[4]]-1)-~SYM[2]] = ~VAR[vec][4][~SYM[2]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]];
end
~ENDGENERATE

genvar ~GENSYM[i][4];
~GENERATE
for (~SYM[4]=0; ~SYM[4] < ~LIT[3]; ~SYM[4] = ~SYM[4] + 1) begin : ~GENSYM[select][5]
  assign ~RESULT[(~LIT[3]-1-~SYM[4])*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[1][~LIT[1] + (~LIT[2] * ~SYM[4])];
end
~ENDGENERATE
// select end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.++"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "(++) :: Vec n a -> Vec m a -> Vec (n + m) a"
    , "template"  : "{~ARG[0],~ARG[1]}"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.concat"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "concat :: Vec n (Vec m a) -> Vec (n * m) a"
    , "template"  : "~ARG[0]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.splitAt"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "splitAt :: SNat m -> Vec (m + n) a -> (Vec m a, Vec n a)"
    , "template"  : "~ARG[1]"
    }
  }
, { "BlackBox" :
    { "name" : "Clash.Sized.Vector.unconcat"
    , "workInfo"  : "Never"
    , "kind" : "Expression"
    , "type" :
 "unconcat :: KnownNat n     -- ARG[0]
           => SNat m         -- ARG[1]
           -> Vec (n * m) a  -- ARG[2]
           -> Vec n (Vec m a)"
    , "template" : "~ARG[2]~DEVNULL[~ARG[0]]~DEVNULL[~ARG[1]]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.map"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "map :: (a -> b) -> Vec n a -> Vec n b"
    , "template"  :
"// map begin
genvar ~GENSYM[i][1];
~GENERATE
for (~SYM[1]=0; ~SYM[1] < ~LENGTH[~TYPO]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[map][2]~IF~SIZE[~TYP[1]]~THEN
  wire ~TYPEL[~TYP[1]] ~GENSYM[map_in][3];
  assign ~SYM[3] = ~VAR[vec][1][~SYM[1]*~SIZE[~TYPEL[~TYP[1]]]+:~SIZE[~TYPEL[~TYP[1]]]];~ELSE ~FI
  ~OUTPUTWIREREG[0] ~TYPEL[~TYPO] ~GENSYM[map_out][4];
  ~INST 0
    ~OUTPUT <= ~SYM[4]~ ~TYPEL[~TYPO]~
    ~INPUT  <= ~SYM[3]~ ~TYPEL[~TYP[1]]~
  ~INST
  assign ~RESULT[~SYM[1]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[4];
end
~ENDGENERATE
// map end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.imap"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "imap :: KnownNat n => (Index n -> a -> b) -> Vec n a -> Vec n b"
    , "template"  :
"// imap begin
genvar ~GENSYM[i][1];
~GENERATE
for (~SYM[1]=0; ~SYM[1] < ~LENGTH[~TYPO]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]
  wire [~SIZE[~INDEXTYPE[~LIT[0]]]-1:0] ~GENSYM[map_index][3];~IF~SIZE[~TYP[2]]~THEN
  wire ~TYPEL[~TYP[2]] ~GENSYM[map_in][4];
  assign ~SYM[4] = ~VAR[vec][2][~SYM[1]*~SIZE[~TYPEL[~TYP[2]]]+:~SIZE[~TYPEL[~TYP[2]]]];~ELSE ~FI
  ~OUTPUTWIREREG[1] ~TYPEL[~TYPO] ~GENSYM[map_out][5];

  assign ~SYM[3] = ~SIZE[~INDEXTYPE[~LIT[0]]]'d~MAXINDEX[~TYPO] - ~SYM[1][0+:~SIZE[~INDEXTYPE[~LIT[0]]]];
  ~INST 1
    ~OUTPUT <= ~SYM[5]~ ~TYPEL[~TYPO]~
    ~INPUT  <= ~SYM[3]~ ~INDEXTYPE[~LIT[0]]~
    ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[2]]~
  ~INST
  assign ~RESULT[~SYM[1]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[5];
end
~ENDGENERATE
// imap end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.imap_go"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "imap :: Index n -> (Index n -> a -> b) -> Vec m a -> Vec m b"
    , "template"  :
"// imap begin
genvar ~GENSYM[i][1];
~GENERATE
for (~SYM[1]=0; ~SYM[1] < ~LENGTH[~TYPO]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]
  wire ~TYP[0] ~GENSYM[map_index][3];~IF~SIZE[~TYP[2]]~THEN
  wire ~TYPEL[~TYP[2]] ~GENSYM[map_in][4];
  assign ~SYM[4] = ~VAR[vec][2][~SYM[1]*~SIZE[~TYPEL[~TYP[2]]]+:~SIZE[~TYPEL[~TYP[2]]]];~ELSE ~FI
  ~OUTPUTWIREREG[1] ~TYPEL[~TYPO] ~GENSYM[map_out][5];

  assign ~SYM[3] = ~SIZE[~TYP[0]]'d~MAXINDEX[~TYPO] - ~SYM[1][0+:~SIZE[~TYP[0]]] + ~ARG[0];
  ~INST 1
    ~OUTPUT <= ~SYM[5]~ ~TYPEL[~TYPO]~
    ~INPUT  <= ~SYM[3]~ ~TYP[0]~
    ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[2]]~
  ~INST
  assign ~RESULT[~SYM[1]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[5];
end
~ENDGENERATE
// imap end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.zipWith"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "zipWith :: (a -> b -> c) -> Vec n a -> Vec n b -> Vec n c"
    , "template"  :
"// zipWith start
genvar ~GENSYM[i][2];
~GENERATE
for (~SYM[2] = 0; ~SYM[2] < ~LENGTH[~TYPO]; ~SYM[2] = ~SYM[2] + 1) begin : ~GENSYM[zipWith][6]~IF~SIZE[~TYP[1]]~THEN
  wire ~TYPEL[~TYP[1]] ~GENSYM[zipWith_in1][3];
  assign ~SYM[3] = ~VAR[vec1][1][~SYM[2]*~SIZE[~TYPEL[~TYP[1]]]+:~SIZE[~TYPEL[~TYP[1]]]];~ELSE ~FI~IF~SIZE[~TYP[2]]~THEN
  wire ~TYPEL[~TYP[2]] ~GENSYM[zipWith_in2][4];
  assign ~SYM[4] = ~VAR[vec2][2][~SYM[2]*~SIZE[~TYPEL[~TYP[2]]]+:~SIZE[~TYPEL[~TYP[2]]]];~ELSE ~FI
  ~OUTPUTWIREREG[0] ~TYPEL[~TYPO] ~SYM[5];
  ~INST 0
    ~OUTPUT <= ~SYM[5]~ ~TYPEL[~TYPO]~
    ~INPUT  <= ~SYM[3]~ ~TYPEL[~TYP[1]]~
    ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[2]]~
  ~INST
  assign ~RESULT[~SYM[2]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[5];
end
~ENDGENERATE
// zipWith end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.foldr"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "foldr :: (a -> b -> b) -> b -> Vec n a -> b"
    , "template"  :
"// foldr start~IF ~LENGTH[~TYP[2]] ~THEN
wire ~TYPO ~GENSYM[intermediate][0] [0:~LENGTH[~TYP[2]]];
assign ~SYM[0][~LENGTH[~TYP[2]]] = ~ARG[1];

genvar ~GENSYM[i][3];
~GENERATE
for (~SYM[3]=0; ~SYM[3] < ~LENGTH[~TYP[2]]; ~SYM[3]=~SYM[3]+1) begin : ~GENSYM[foldr][4]~IF~SIZE[~TYP[2]]~THEN
  wire ~TYPEL[~TYP[2]] ~GENSYM[foldr_in1][5];
  assign ~SYM[5] = ~VAR[xs][2][(~LENGTH[~TYP[2]]-1-~SYM[3])*~SIZE[~TYPEL[~TYP[2]]]+:~SIZE[~TYPEL[~TYP[2]]]];~ELSE ~FI
  wire ~TYPO ~GENSYM[foldr_in2][6];
  ~OUTPUTWIREREG[0] ~TYPO ~GENSYM[foldr_out][7];

  assign ~SYM[6] = ~SYM[0][~SYM[3]+1];
  ~INST 0
    ~OUTPUT <= ~SYM[7]~ ~TYP[1]~
    ~INPUT  <= ~SYM[5]~ ~TYPEL[~TYP[2]]~
    ~INPUT  <= ~SYM[6]~ ~TYP[1]~
  ~INST
  assign ~SYM[0][~SYM[3]] = ~SYM[7];
end
~ENDGENERATE

assign ~RESULT = ~SYM[0][0];
~ELSE
assign ~RESULT = ~ARG[1];
~FI// foldr end"
    }
  }
, { "BlackBoxHaskell" :
    { "name"             : "Clash.Sized.Vector.index_int"
    , "templateFunction" : "Clash.Primitives.Sized.Vector.indexIntVerilog"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.replace_int"
    , "kind"      : "Declaration"
    , "type"      : "replace_int :: KnownNat n => Vec n a -> Int -> a -> Vec n a"
    , "template"  :
"// vector replace begin
genvar ~GENSYM[i][0];
~GENERATE
for (~SYM[0]=0;~SYM[0]<~LENGTH[~TYPO];~SYM[0]=~SYM[0]+1) begin : ~GENSYM[vector_replace][1]
  assign ~RESULT[(~MAXINDEX[~TYPO]-~SYM[0])*~SIZE[~TYP[3]]+:~SIZE[~TYP[3]]] = ~ARG[2] == ~SYM[0] ? ~ARG[3] : ~VAR[vec][1][(~MAXINDEX[~TYPO]-~SYM[0])*~SIZE[~TYP[3]]+:~SIZE[~TYP[3]]];
end
~ENDGENERATE
// vector replace end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.maxIndex"
    , "workInfo"  : "Constant"
    , "kind"      : "Expression"
    , "type"      : "maxIndex :: KnownNat n => Vec n a -> Int"
    , "template"  : "~SIZE[~TYPO]'sd~LIT[0] - ~SIZE[~TYPO]'d1"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.length"
    , "workInfo"  : "Constant"
    , "kind"      : "Expression"
    , "type"      : "length :: KnownNat n => Vec n a -> Int"
    , "template"  : "~SIZE[~TYPO]'sd~LIT[0]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.replicate"
    , "workInfo"  : "Never"
    , "kind"      : "Expression"
    , "type"      : "replicate :: SNat n -> a -> Vec n a"
    , "template"  : "{~LIT[0] {~ARG[1]}}"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.transpose"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "transpose :: KnownNat n => Vec m (Vec n a) -> Vec n (Vec m a)"
    , "template"  :
"// transpose begin
genvar ~GENSYM[row_index][1];
genvar ~GENSYM[col_index][2];
~GENERATE
for (~SYM[1] = 0; ~SYM[1] < ~LENGTH[~TYP[1]]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[transpose_outer][3]
  for (~SYM[2] = 0; ~SYM[2] < ~LENGTH[~TYPO]; ~SYM[2] = ~SYM[2] + 1) begin : ~GENSYM[transpose_inner][4]
    assign ~RESULT[((~SYM[2]*~SIZE[~TYPEL[~TYPO]])+(~SYM[1]*~SIZE[~TYPEL[~TYPEL[~TYPO]]]))+:~SIZE[~TYPEL[~TYPEL[~TYPO]]]] = ~VAR[matrix][1][((~SYM[1]*~SIZE[~TYPEL[~TYP[1]]])+(~SYM[2]*~SIZE[~TYPEL[~TYPEL[~TYPO]]]))+:~SIZE[~TYPEL[~TYPEL[~TYPO]]]];
  end
end
~ENDGENERATE
// transpose end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.reverse"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "reverse :: Vec n a -> Vec n a"
    , "template"  :
"// reverse begin
genvar ~GENSYM[i][1];
~GENERATE
for (~SYM[1] = 0; ~SYM[1] < ~LENGTH[~TYPO]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[reverse][2]
  assign ~RESULT[(~LENGTH[~TYPO] - 1 - ~SYM[1])*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~VAR[vec][0][~SYM[1]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]];
end
~ENDGENERATE
// reverse end"
    }
  }
, { "BlackBox" :
    { "name" : "Clash.Sized.Vector.concatBitVector#"
    , "workInfo" : "Never"
    , "kind" : "Expression"
    , "type" :
"concatBitVector# :: (KnownNat n, KnownNat m) -- (ARG[0],ARG[1])
                  => Vec n (BitVector m)      -- ARG[2]
                  -> BitVector (n * m)"
    , "template" : "~ARG[2]"
    }
  }
, { "BlackBox" :
    { "name" : "Clash.Sized.Vector.unconcatBitVector#"
    , "workInfo" : "Never"
    , "kind" : "Expression"
    , "type" :
"unconcatBitVector# :: (KnownNat n, KnownNat m) -- (ARG[0],ARG[1])
                    => BitVector (n * m)        -- ARG[2]
                    -> Vec n (BitVector m)"
    , "template" : "~ARG[2]"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.rotateLeftS"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "rotateLeftS :: KnownNat n => Vec n a -> SNat d -> Vec n a"
    , "template"  :
"// rotateLeftS begin
localparam ~GENSYM[shift_amount][2] = ~LIT[2] % ~LIT[0];

~GENERATE
if (~SYM[2] == 0) begin : ~GENSYM[no_shift][3]
  assign ~RESULT = ~VAR[vec][1];
end else begin : ~GENSYM[do_shift][4]
  assign ~RESULT = {~VAR[vec][1][((~LIT[0]-~SYM[2])*~SIZE[~TYPEL[~TYPO]])-1 : 0]
                   ,~VAR[vec][1][~SIZE[~TYPO]-1 : (~LIT[0]-~SYM[2])*~SIZE[~TYPEL[~TYPO]]]
                   };
end
~ENDGENERATE
// rotateLeftS end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Vector.rotateRightS"
    , "workInfo"  : "Never"
    , "kind"      : "Declaration"
    , "type"      : "rotateRightS :: KnownNat n => Vec n a -> SNat d -> Vec n a"
    , "template"  :
"// rotateRightS begin
localparam ~GENSYM[shift_amount][2] = ~LIT[2] % ~LIT[0];

~GENERATE
if (~SYM[2] == 0) begin : ~GENSYM[no_shift][3]
  assign ~RESULT = ~VAR[vec][1];
end else begin : ~GENSYM[do_shift][4]
  assign ~RESULT = {~VAR[vec][1][(~SYM[2]*~SIZE[~TYPEL[~TYPO]])-1 : 0]
                   ,~VAR[vec][1][~SIZE[~TYPO]-1 : ~SYM[2]*~SIZE[~TYPEL[~TYPO]]]
                   };
end
~ENDGENERATE
// rotateRightS end"
    }
  }
]