Safe Haskell | None |
---|---|

Language | Haskell2010 |

- type Signal a = CSignal SystemClock a
- signal :: a -> Signal a
- register :: a -> Signal a -> Signal a
- regEn :: a -> Signal Bool -> Signal a -> Signal a
- mux :: CSignal clk Bool -> CSignal clk a -> CSignal clk a -> CSignal clk a
- (.&&.) :: CSignal clk Bool -> CSignal clk Bool -> CSignal clk Bool
- (.||.) :: CSignal clk Bool -> CSignal clk Bool -> CSignal clk Bool
- not1 :: CSignal clk Bool -> CSignal clk Bool
- class Bundle a
- type Unbundled' a = Unbundled SystemClock a
- bundle' :: Bundle a => Unbundled' a -> Signal a
- unbundle' :: Bundle a => Signal a -> Unbundled' a
- simulate :: (Signal a -> Signal b) -> [a] -> [b]
- simulateB :: (Bundle a, Bundle b) => (Unbundled' a -> Unbundled' b) -> [a] -> [b]
- sample :: Signal a -> [a]
- sampleN :: Int -> Signal a -> [a]
- fromList :: [a] -> Signal a
- (.==.) :: Eq a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- (./=.) :: Eq a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- compare1 :: Ord a => CSignal clk a -> CSignal clk a -> CSignal clk Ordering
- (.<.) :: Ord a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- (.<=.) :: Ord a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- (.>=.) :: Ord a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- (.>.) :: Ord a => CSignal clk a -> CSignal clk a -> CSignal clk Bool
- fromEnum1 :: Enum a => CSignal clk a -> CSignal clk Int
- toRational1 :: Real a => CSignal clk a -> CSignal clk Rational
- toInteger1 :: Integral a => CSignal clk a -> CSignal clk Integer
- testBit1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk Bool
- popCount1 :: Bits a => CSignal clk a -> CSignal clk Int
- shift1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- rotate1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- setBit1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- clearBit1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- shiftL1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- unsafeShiftL1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- shiftR1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- unsafeShiftR1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- rotateL1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a
- rotateR1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a

# Implicitly clocked synchronous signal

type Signal a = CSignal SystemClock a Source

Signal synchronised to the "system" clock, which has a period of 1000.

# Basic circuit functions

signal :: a -> Signal a Source

Create a constant `Signal`

from a combinational value

`>>>`

[4, 4, 4, 4, ...`sample (signal 4)`

# Boolean connectives

# Product/Signal isomorphism

Isomorphism between a `CSignal`

of a product type (e.g. a tuple) and a
product type of `CSignal`

s.

Instances of `Bundle`

must satisfy the following laws:

bundle . unbundle =`id`

unbundle . bundle =`id`

Bundle Bool | |

Bundle Double | |

Bundle Float | |

Bundle Int | |

Bundle Integer | |

Bundle () | |

Bundle (Maybe a) | |

Bundle (Index n) | |

Bundle (BitVector n) | |

Bundle (Signed n) | |

Bundle (Unsigned n) | |

Bundle (Either a b) | |

Bundle (a, b) | |

KnownNat n => Bundle (Vec n a) | |

Bundle (a, b, c) | |

Bundle (Fixed rep int frac) | |

Bundle (a, b, c, d) | |

Bundle (a, b, c, d, e) | |

Bundle (a, b, c, d, e, f) | |

Bundle (a, b, c, d, e, f, g) | |

Bundle (a, b, c, d, e, f, g, h) |

type Unbundled' a = Unbundled SystemClock a Source

bundle' :: Bundle a => Unbundled' a -> Signal a Source

Example:

bundle' :: (Signal a, Signal b) -> Signal (a,b)

However:

bundle' :: Signal Bit -> Signal Bit

unbundle' :: Bundle a => Signal a -> Unbundled' a Source

Example:

unbundle' :: Signal (a,b) -> (Signal a, Signal b)

However:

unbundle' :: Signal Bit -> Signal Bit

# Simulation functions (not synthesisable)

simulateB :: (Bundle a, Bundle b) => (Unbundled' a -> Unbundled' b) -> [a] -> [b] Source

Simulate a (

) function given a list of samples
of type `Bundled`

a -> `Bundled`

b`a`

`>>>`

[(8,8), (1,1), (2,2), (3,3), ...`simulateB (wrap . register (8,8) . unwrap) [(1,1), (2,2), (3,3), ...`

**NB**: This function is not synthesisable

# List <-> Signal conversion (not synthesisable)

fromList :: [a] -> Signal a Source

Create a `Signal`

from a list

Every element in the list will correspond to a value of the signal for one clock cycle.

`>>>`

[1,2]`sampleN 2 (fromList [1,2,3,4,5])`

**NB**: This function is not synthesisable

# Type classes

`Eq`

-like

`Ord`

-like

`Enum`

-like

`Rational`

-like

toRational1 :: Real a => CSignal clk a -> CSignal clk Rational Source

Version of `toRational`

that returns a `CSignal`

of `Rational`

`Integral`

-like

toInteger1 :: Integral a => CSignal clk a -> CSignal clk Integer Source

Version of `toRational`

that returns a `CSignal`

of `Integer`

`Bits`

-like

unsafeShiftL1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a Source

Version of `unsafeShiftL`

that has a `CSignal`

of `Int`

as indexing argument

unsafeShiftR1 :: Bits a => CSignal clk a -> CSignal clk Int -> CSignal clk a Source

Version of `unsafeShiftR`

that has a `CSignal`

of `Int`

as indexing argument