clash-prelude-0.9: CAES Language for Synchronous Hardware - Prelude library

Copyright(C) 2015, University of Twente
LicenseBSD2 (see the file LICENSE)
MaintainerChristiaan Baaij <christiaan.baaij@gmail.com>
Safe HaskellSafe
LanguageHaskell2010
Extensions
  • DataKinds
  • FlexibleContexts
  • MagicHash
  • TypeOperators
  • ExplicitNamespaces

CLaSH.Prelude.ROM

Contents

Description

ROMs

Synopsis

Asynchronous ROM

asyncRom Source

Arguments

:: (KnownNat n, Enum addr) 
=> Vec n a

ROM content

NB: must be a constant

-> addr

Read address rd

-> a

The value of the ROM at address rd

An asynchronous/combinational ROM with space for n elements

Additional helpful information:

asyncRomPow2 Source

Arguments

:: (KnownNat (2 ^ n), KnownNat n) 
=> Vec (2 ^ n) a

ROM content

NB: must be a constant

-> Unsigned n

Read address rd

-> a

The value of the ROM at address rd

An asynchronous/combinational ROM with space for 2^n elements

Additional helpful information:

Synchronous ROM synchronised to the system clock

rom Source

Arguments

:: (KnownNat n, KnownNat m) 
=> Vec n a

ROM content

NB: must be a constant

-> Signal (Unsigned m)

Read address rd

-> Signal a

The value of the ROM at address rd

A ROM with a synchronous read port, with space for n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined

Additional helpful information:

romPow2 Source

Arguments

:: (KnownNat (2 ^ n), KnownNat n) 
=> Vec (2 ^ n) a

ROM content

NB: must be a constant

-> Signal (Unsigned n)

Read address rd

-> Signal a

The value of the ROM at address rd

A ROM with a synchronous read port, with space for 2^n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined

Additional helpful information:

Synchronous ROM synchronised to an arbitrary clock

rom' Source

Arguments

:: (KnownNat n, Enum addr) 
=> SClock clk

Clock to synchronize to

-> Vec n a

ROM content

NB: must be a constant

-> Signal' clk addr

Read address rd

-> Signal' clk a

The value of the ROM at address rd from the previous clock cycle

A ROM with a synchronous read port, with space for n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined

Additional helpful information:

romPow2' Source

Arguments

:: (KnownNat (2 ^ n), KnownNat n) 
=> SClock clk

Clock to synchronize to

-> Vec (2 ^ n) a

ROM content

NB: must be a constant

-> Signal' clk (Unsigned n)

Read address rd

-> Signal' clk a

The value of the ROM at address rd

A ROM with a synchronous read port, with space for 2^n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined

Additional helpful information:

Internal

asyncRom# Source

Arguments

:: KnownNat n 
=> Vec n a

ROM content

NB: must be a constant

-> Int

Read address rd

-> a

The value of the ROM at address rd

asyncROM primitive

rom# Source

Arguments

:: KnownNat n 
=> SClock clk

Clock to synchronize to

-> Vec n a

ROM content

NB: must be a constant

-> Signal' clk Int

Read address rd

-> Signal' clk a

The value of the ROM at address rd from the previous clock cycle

ROM primitive