| Copyright | (c) David Cox 2021 |
|---|---|
| License | BSD 3-Clause |
| Maintainer | standardsemiconductor@gmail.com |
| Safe Haskell | None |
| Language | Haskell2010 |
Ice40.Spram
Description
SPRAM hard IP primitive from Lattice Ice Technology Library
Documentation
Arguments
| :: KnownDomain dom | |
| => Clock dom | clock |
| -> Signal dom (BitVector 14) | address |
| -> Signal dom (BitVector 16) | dataIn |
| -> Signal dom (BitVector 4) | maskWrEn |
| -> Signal dom Bit | wrEN |
| -> Signal dom Bit | chipSelect |
| -> Signal dom Bit | standBy |
| -> Signal dom Bit | sleep |
| -> Signal dom Bit | powerOff |
| -> Signal dom (BitVector 16) | dataOut |
Single port RAM primitive