Portability | non-portable |
---|---|
Stability | experimental |
Maintainer | pweaver@signalicorp.com |
Utility functions for constructing Netlist AST elements.
- data Direction
- unsizedInteger :: Integer -> Expr
- unsizedIntegral :: Integral a => a -> Expr
- sizedInteger :: Int -> Integer -> Expr
- sizedIntegral :: Integral a => Int -> a -> Expr
- makeRange :: Direction -> Size -> Maybe Range
- exprConcat :: [Expr] -> Expr
- statements :: [Stmt] -> Stmt
- generateReg :: Expr -> Expr -> Maybe (Expr, Expr) -> Maybe (Expr, Expr) -> Maybe Expr -> Expr -> Decl
Documentation
unsizedInteger :: Integer -> ExprSource
unsizedIntegral :: Integral a => a -> ExprSource
sizedInteger :: Int -> Integer -> ExprSource
sizedIntegral :: Integral a => Int -> a -> ExprSource
exprConcat :: [Expr] -> ExprSource
Concatenate a list of expressions, unless there is just one expression.
statements :: [Stmt] -> StmtSource
Make a Seq
statement from a list of statements, unless there is just one
statement.
generateReg :: Expr -> Expr -> Maybe (Expr, Expr) -> Maybe (Expr, Expr) -> Maybe Expr -> Expr -> DeclSource
generate a process declaration for a generic register based on the following:
- the register name (as an expression)
- clock expression
- width of the register
- optional asynchronous reset and initial value
- optional clock enable
- optional synchronous restart and initial value
- optional load enable
- when enabled, the expression to assign to the identifier
You can implement a shift register by passing in a concatenation for the register expression and the input expression, though that is not compatible with VHDL.