verilog: A Verilog parser.

[ bsd3, embedded, hardware, language, library ] [ Propose Tags ]

This parser supports a very small subset of Verilog-95. It is intended primarly for machine generated, synthesizable code.

Versions [faq] 0.0.0, 0.0.1, 0.0.2, 0.0.4, 0.0.5, 0.0.6, 0.0.7, 0.0.8, 0.0.9, 0.0.10, 0.0.11
Dependencies array, base (>=4.0 && <5), polyparse [details]
License BSD-3-Clause
Author Tom Hawkins <>
Maintainer Tom Hawkins <>
Category Language, Hardware
Home page
Source repo head: git clone git://
Uploaded by TomHawkins at 2011-11-16T02:58:55Z
Distributions NixOS:0.0.11
Downloads 6561 total (7 in the last 30 days)
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Status Hackage Matrix CI
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