Changes between Version 24 and Version 25 of SIMDPlan

Timestamp:

10/14/11 10:52:55 (19 months ago)

Author:

pmonday

Comment:

--

SIMDPlan

@@ -186 +186 @@
 Once the LLVM Code Generator is modified to support Double instructions, tests can be run to ensure the “bottom half” of the stack works.
 
-== Modify Remaining Code Generators ==
-
-Until a compiler step is available that removes the new MachOps for other code generators, or a switch is a available that completely turns off other code generators, the native (and probably C) code generators will have to be modified to accept the new MachOps and convert them to equivalent supported MachOps.  Without the modifications, the compile will not complete successfully.
+== Modify Native Code Generator ==
+
+Unfortunately, the native code generator will also have to be recompiled.  The GHC compilation depends on a 6.x version of GHC, before native LLVM code generation was built into the HEAD (so simply modifying the mk/build.mk file to go to -fllvm does not work).
 
 For x86 Native Code Generation, locate the ./compiler/nativeGen/X86/CodeGen.hs file and modify it appropriately.  For the example above, simply adding a conversion from MO_VF_Add to the equivalent non-vector add is sufficient.