úÎŰśÎșČ      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽ‘’“”•–—˜™š›œžŸ ĄąŁ€„Š§š©Ș«Ź­źŻ°±(c) Galois, Inc. 2014BSD3jhendrix@galois.com experimentalportable Safe-Inferred!"-68HM1Result of a verification check.Satisfiability check result.BSome graph quantifies over the state phantom variable for a graph. tA network is an and-inverstor graph paired with it's outputs, thus representing a complete combinational circuit. CAn And-Inverter-Graph is a data structure storing bit-level nodes.ßGraphs are and-inverter graphs, which contain a number of input literals and Boolean operations for creating new literals. Every literal is part of a specific graph, and literals from different networks may not be mixed.»Both the types for literals and graphs must take a single phantom type for an arugment that is used to ensure that literals from different networks cannot be used in the same operation. ?Create a temporary graph, and use it to compute a result value.6Build a new graph instance, and packge it into the . type that remembers the IsAIG implementation.6Read an AIG from a file, assumed to be in Aiger format7Get unique literal in graph representing constant true.8Get unique literal in graph representing constant false.!Generate a constant literal valueRReturn if the literal is a fixed constant. If the literal is symbolic, return Nothing.Generate a fresh input literal'Compute the logical and of two literals+Build the conjunction of a list of literals&Compute the logical or of two literals,Compute the logical equality of two literals/Compute the logical implication of two literals(Compute the exclusive or of two literals)Perform a mux (if-then-else on the bits).%Return number of inputs in the graph.&Get input at given index in the graph. Write network out to AIGER file.+Check if literal is satisfiable in network. +Perform combinational equivalence checking.!1Evaluate the network on a set of concrete inputs."1Evaluate the network on a set of concrete inputs.#IBuild an evaluation function over an AIG using the provided view function$_A proxy is used to identify a specific AIG instance when calling methods that create new AIGs.'Negate a literal.(“Tests whether two lits are identical. This is only a syntactic check, and may return false even if the two literals represent the same predicate.,EConcrete datatype representing the ways an AIG can be constructed.3;Evaluate the given literal using the provided view function4DEvaluate the given list of literals using the provided view function58Build an AIG literal by unfolding a constructor function6@Build a list of AIG literals by unfolding a constructor function72Extract a tree representation of the given literal83Construct an AIG literal from a tree representation9>Extract a forest representation of the given list of literal s:=Construct a list of AIG literals from a forest representation;^Short-cutting mux operator that optimizes the case where the test bit is a concrete literalČUnpack  SomeGraph7 in a local scope so it can be used to compute a result=7Convert a sat result to a verify result by negating it.>7Convert a verify result to a sat result by negating it.?Generate an arbitrary , given a generator for a@Generate an arbitrary )AjGiven a LitTree, calculate the maximum input number in the tree. Returns 0 if no inputs are referenced.B>Given a list of LitTree, construct a corresponding AIG networkC/Generate a random network by building a random )* and using that to construct a network.F A $C value, used for selecting the concrete implementation typeclass The AIG graph computation to run !"#$%&'()*+,-./0123456789:;<Č=>?@ABCłD  !"#$%&'()*+,-./0123456789:;<=>?@ABCD&'(  !"#;$% <,210/.-)*+789:3456>=?@ABC    !"#$%&'()*+,210/.-3456789:;<Č=>?@ABCł(c) Galois, Inc. 2014BSD3jhendrix@galois.com experimentalportableNoneMTDlA BitVector consists of a sequence of symbolic bits and can be used for symbolic machine-word arithmetic.EEmpty bitvectorFNumber of bits in a bit vectorGGenerate a bitvector of length n, using function f0 to specify the bit literals. The indexes to f% are given in LSB-first order, i.e., f 0 is the least significant bit.HGenerate a bitvector of length n, using monadic function f1 to generate the bit literals. The indexes to f% are given in LSB-first order, i.e., f 0 is the least significant bit.IGenerate a bitvector of length n, using function f0 to specify the bit literals. The indexes to f% are given in MSB-first order, i.e., f 0 is the most significant bit.JGenerate a bitvector of length n, using monadic function f1 to generate the bit literals. The indexes to f% are given in MSB-first order, i.e., f 0 is the most significant bit.K Generate a bit vector of length n" where every bit value is literal l.L Generate a bit vector of length n/ where every bit value is generated in turn by m.M=Generate a one-element bitvector containing the given literalN/Project the individual bits of a BitVector. x N 0P is the most significant bit. It is an error to request an out-of-bounds bit.OGAppend two bitvectors, with the most significant bitvector given first.PaConcatenate a list of bitvectors, with the most significant bitvector at the head of the list.QProject out the n( most significant bits from a bitvector.R Drop the n( most significant bits from a bitvector.SExtract n bits starting at index i&. The vector must contain at least i+n elementsTExtract n bits starting at index ig, counting from the end of the vector instead of the beginning. The vector must contain at least i+n elements.UDApply a monadic operation to each element of a bitvector in sequenceV.Combine two bitvectors with a bitwise functionW>Combine two bitvectors with a bitwise monadic combiner action.X:Convert a bitvector to a list, most significant bit first.Y=Convert a list to a bitvector, assuming big-endian bit order.ZJSelect bits from a bitvector, starting from the least significant bit. x ! 0Q is the least significant bit. It is an error to request an out-of-bounds bit.[§Display a bitvector as a string of bits with most significant bits first. Concrete literals are displayed as '0' or '1', whereas symbolic literals are displayed as x.\PGenerate a bitvector from an integer value, using 2's complement representation.]6Interpret a bitvector as an unsigned integer. Return Nothing% if the bitvector is not concrete.^3Interpret a bitvector as a signed integer. Return Nothing% if the bitvector is not concrete._1Retrieve the most significant bit of a bitvector.`2Retrieve the least significant bit of a bitvector.a'If-then-else combinator for bitvectors.bŻIf-then-else combinator for bitvector computations with optimistic shortcutting. If the test bit is concrete, we can avoid generating either the if or the else circuit.cLazy negation of a circuit.eƒBuild a short-cut OR circuit. If the left argument evaluates to the constant true, the right argument will not be evaluated.ghConstruct a lazy equality test. If both arguments are constants, the output will also be a constant.i…Build a short-cut AND circuit. If the left argument evaluates to the constant false, the right argument will not be evaluated.l^Construct a lazy xor. If both arguments are constants, the output will also be a constant.ŽAA half adder which takes two inputs and returns output and carry.”CA full adder which takes three inputs and returns output and carry.¶VImplements a ripple carry adder. Both addends are assumed to have the same length.·LA subtraction circuit which takes three inputs and returns output and carry.ž:Subtract two bit vectors, returning result and borrow bit.č-Compute just the borrow bit of a subtraction.m2Compute the 2's complement negation of a bitvectorn:Add two bitvectors with the same size. Discard carry bit.o1Add two bitvectors with the same size with carry.pKSubtract one bitvector from another with the same size. Discard carry bit.qBSubtract one bitvector from another with the same size with carry.r#Add a constant value to a bitvectors#Add a constant value to a bitvectort€Multiply two bitvectors with the same size, with result of the same size as the arguments. Overflow is silently discarded.u+Unsigned multiply two bitvectors with size m and size n#, resulting in a vector of size m+n.v)Signed multiply two bitvectors with size m and size n#, resulting in a vector of size m+n.wHCompute the signed quotient of two signed bitvectors with the same size.xRCompute the signed division remainder of two signed bitvectors with the same size.ș>Cons value to head of a list and shift other elements to left.y*Return absolute value of signed bitvector.»Bitblast version of unsigned quotRem.zLCompute the unsigned quotient of two unsigned bitvectors with the same size.{VCompute the unsigned division remainder of two unsigned bitvectors with the same size.|4Test syntactic equalify of two bitvectors using the ( operation}3Test equality of two bitvectors with the same size.~$Test if a bitvector is equal to zero)Test if a bitvector is distinct from zero€3Unsigned less-than on bitvector with the same size.<Unsigned less-than-or-equal on bitvector with the same size.‚1Signed less-than on bitvector with the same size.ƒ:Signed less-than-or-equal on bitvector with the same size.„sext v n sign extends v to be a vector with length n. This function requires that  n >= length v and  length v > 0.… zext g v n zero extends v to be a vector with length n. This function requires that  n >= length v.†5Truncate the given bit vector to the specified length‡HTruncate or zero-extend a bitvector to have the specified number of bitsˆHTruncate or sign-extend a bitvector to have the specified number of bits‰&muxInteger mergeFn maxValue lv valueFn$ returns a circuit whose result is  valueFn v when lv has value v.Š1Shift left. The least significant bit becomes 0.ŒShift left by a constant.œShift right by a constant.‹8Signed right shift. The most significant bit is copied.Œ:Unsigned right shift. The most significant bit becomes 0.ŸRotate left by a constant.żRotate right by a constant. Rotate left.Ž Rotate right.‰Polynomial multiplication. Note that the algorithm works the same no matter which endianness convention is used. Result length is  max 0 (m+n-1), where m and n are the lengths of the inputs.gPolynomial mod with symbolic modulus. Return value has length one less than the length of the modulus.bDÀÁEFÂGn#, length of the generated bitvectorf$, function to calculate bit literalsHn#, length of the generated bitvectorf', computation to generate a bit literalĂn#, length of the generated bitvectorf', computation to generate a bit literalIn#, length of the generated bitvectorf$, function to calculate bit literalsJn#, length of the generated bitvectorf', computation to generate a bit literalKn, length of the bitvectorl, the value to replicateLn, length of the bitvectorm&, the computation to produce a literalMNOPQRSi, 0-based start indexn, bits to take%a vector consisting of the bits from i to i+n-1Ti0, 0-based start index from the end of the vectorn, bits to takeUVWXYZ[\)number of bits in the resulting bitvector integer value]^_`atest bitthen bitvectorelse bitvectorbtest bitthen circuit computationelse circuit computationcdefghiÄjklŽ”¶sum and carry-out bit·žčmnopqrstuvwxșĆyÆ»Çz{|}~€‚ƒ„…†‡ˆ‰.Maximum value input vector is allowed to take. Input vectorŠthe value to shifthow many places to shiftŒœ‹the value to shifthow many places to shiftŒthe value to shifthow many places to shiftŸżthe value to rotatehow many places to rotateŽthe value to rotatehow many places to rotateÈMDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽMDEFNZOPQRSTUVW_`|[JIHGKL\Y‰Mijeflkghcdab]^Xmnopqrstuvwxz{Š‹ŒŽ}~ƒ‚€y„…†‡ˆ`DÀÁEFÂGHĂIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghiÄjklŽ”¶·žčmnopqrstuvwxșĆyÆ»Çz{|}~€‚ƒ„…†‡ˆ‰ŠŒœ‹ŒŸżŽÈ(c) Galois, Inc. 2014BSD3jhendrix@galois.com experimentalportableNone2468=HM!‘’“”•–—˜™š›œžŸ ĄąŁ€„Š§š©Ș«Ź­źŻ°±‘’“”•–—˜™š›œžŸ ĄąŁ!œž™š›•–—˜Ÿ Ąą±°Ż“”‘’ź­Ź«Ș©š§Š„Ł€‘’“”•–—˜™š›œžŸ ĄąŁ€„Š§š©Ș«Ź­źŻ°±(c) Galois, Inc. 2014BSD3jhendrix@galois.com experimentalportableNone‘  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽÉ       !"#$%&''()*++,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽ‘’“”•––—˜™™š›œžŸ ĄąŁ€„Š§š©Ș«Ź­źŻ°±ČłŽ”¶·žčș»ŒœŸEżÀÁÂĂÄĆÆÇaig-0.2Data.AIG.InterfaceData.AIG.OperationsData.AIG.TraceData.AIG VerifyResult VerifyUnknownInvalidValid SatResult SatUnknownSatUnsat SomeGraphNetworkIsAIG withNewGraphnewGraph aigerNetworktrueLitfalseLitconstant asConstantnewInputandandsoreqimpliesxormux inputCountgetInput writeAigercheckSatcec evaluatorevaluateabstractEvaluateAIGProxyIsLitnot===LitTree unLitTreeLitViewFalseLitTrueLitNotInputInputNotAndAndfoldAIGfoldAIGs unfoldAIG unfoldAIGs toLitTree fromLitTree toLitForest fromLitForestlazyMuxnetworkInputCounttoVerifyResult toSatResult genLitView genLitTree getMaxInput buildNetwork randomNetworkBVemptylength generate_lsb0generateM_lsb0 generate_msb0generateM_msb0 replicate replicateM singletonat++concattakedropslicesliceRevmapMzipWithzipWithMbvToList bvFromList!bvShow bvFromInteger asUnsignedasSignedmsblsbiteiteMlNotlNot'lOrlOr'lEqlEq'lAndlAnd'lXor'lXornegaddaddCsubsubCaddConstsubConstmulmulFullsmulFullsquotsremsabsuquoturembvSamebvEqisZerononZeroultulesltslesextzexttrunc zeroIntCoerce signIntCoerce muxIntegershlsshrushrrolrorpmulpmod TraceOutput traceOutputTraceOptraceOp TraceGraphtGraphtActiveTraceLit unTraceLit Traceable compareLitshowLitproxyactivateTracingdeactiveTracing withTracingwithNewGraphTracing$fIsAIGTraceLitTraceGraph$fTraceOutputlgVerifyResult$fTraceOutputlgSatResult$fTraceOutputlg()$fTraceOutputlgInt$fTraceOutputlgTraceLit $fTraceOplgIO$fTraceOplg(->)$fTraceOplg(->)0$fTraceOplg(->)1$fTraceOplg(->)2 $fOrdTraceLit $fEqTraceLit$fIsLitTraceLit withSomeGraph$fArbitraryLitTree halfAdder fullAdder ripple_addfullSub ripple_subripple_sub_borrowshiftL1uquotRemshlCshrCrolCrorCunBVtailgenerateM_scan_lsb0lAnd''splitAtnegWhensquotRem $fFunctorBV