!-      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ None&'79_m arithmetic-circuits[Arithmetic circuits without multiplication, i.e. circuits describe affine transformations.arithmetic-circuits\Apply mapping to variable names, i.e. rename variables. (Ideally the mapping is injective.)arithmetic-circuitsEvaluate the arithmetic circuit without mul-gates on the given input. Variable map is assumed to have all the variables referred to in the circuit. Failed lookups are currently treated as 0.arithmetic-circuitsTConvert non-mul circuit to a vector representing the evaluation function. We use a Map, to represent the potentially sparse vector. arithmetic-circuitsEvaluating the affine map representing the arithmetic circuit without mul-gates against inputs. If the input map does not have a variable that is referred to in the affine map, then it is treated as a 0.arithmetic-circuits$lookup function for variable mappingarithmetic-circuits variablesarithmetic-circuitscircuit to evaluatearithmetic-circuitscircuit to translatearithmetic-circuits#constant part and non-constant part arithmetic-circuits1program split into constant and non-constant partarithmetic-circuitsinput variables   None &'79X_m8q arithmetic-circuitsA circuit is a list of multiplication gates along with their output wire labels (which can be intermediate or actual outputs).arithmetic-circuits8An arithmetic circuit with a single multiplication gate.!arithmetic-circuits<Wires are can be labeled in the ways given in this data type&arithmetic-circuitsList output wires of a gate'arithmetic-circuits\Apply mapping to variable names, i.e. rename variables. (Ideally the mapping is injective.)(arithmetic-circuitsEvaluate a single gate)arithmetic-circuitsCheck whether an arithmetic circuit does not refer to intermediate wires before they are defined and whether output wires are not used as input wires.+arithmetic-circuits#Generate enough roots for a circuit,arithmetic-circuitsEvaluate an arithmetic circuit on a given environment containing the inputs. Outputs the entire environment (outputs, intermediate values and inputs).-arithmetic-circuits1Turn a binary expansion back into a single value.(arithmetic-circuitslookup a value at a wirearithmetic-circuitsupdate a value at a wirearithmetic-circuitscontext before evaluationarithmetic-circuitsgatearithmetic-circuitscontext after evaluation,arithmetic-circuitslookup a value at a wirearithmetic-circuitsupdate a value at a wirearithmetic-circuitscircuit to evaluatearithmetic-circuitsinput variablesarithmetic-circuitsinput and output variables-arithmetic-circuits;(binary) wires containing a binary expansion, small-endian !"#$%&'()*+,- '%&*+)!"#$(,-None "#%&'79X_O%arithmetic-circuits`Map AltWire f is isomorphic to Assignment f, assuming the lengths are correct. We can think of  Map Int f# as a (potentially) sparse vector.arithmetic-circuitslength is number of gatesarithmetic-circuitslength is number of gates arithmetic-circuitslength is number of gates arithmetic-circuitslength is number of inputs arithmetic-circuitspointer to aLi arithmetic-circuitspointer to aRi arithmetic-circuitspointer to aOiSarithmetic-circuitswLTarithmetic-circuitswRUarithmetic-circuitswOVarithmetic-circuitswVWarithmetic-circuitscarithmetic-circuitsDistinguish between leftrightout and in wires.Yarithmetic-circuitsRUse different wire type as required for the constraints generated in this module.Zarithmetic-circuitsReplace all input wires v_i with a mul-gate (v_i * 1). This means that when we translate it to linear constraints, the weights matrix for V will always be of rank m, where m is the number of input wires, as is required by the Bulletproof protocol.arithmetic-circuits5Generate constraints for a single multiplication gatearithmetic-circuitsinitial contextarithmetic-circuitsgatearithmetic-circuitscontext after evaluation\arithmetic-circuitscircuit to evaluatearithmetic-circuits,initial context (containing input variables)arithmetic-circuitsinput and output variablesDEIFKJGHLMNOPQRSTUVWXYZ[\]^__DEIFKJGHXQRSTUVWLMNOP[Y]Z\^None&'_PcNone&'1_farithmetic-circuits>Expression data type of (arithmetic) expressions over a field f* with variable names/indices coming from i.arithmetic-circuits truncate bits,  rotate bitsarithmetic-circuits~Truncate a number to the given number of bits and perform a right rotation (assuming small-endianness) within the truncation.arithmetic-circuits>Evaluate arithmetic expressions directly, given an environmentarithmetic-circuitsFresh intermediate variablesarithmetic-circuitsFresh input variablesarithmetic-circuitsFresh output variablesarithmetic-circuitsAMultiply two wires or affine circuits to an intermediate variablearithmetic-circuits,Add a Mul and its output to the ArithCircuitarithmetic-circuitsRotate a list to the rightarithmetic-circuits2Turn a wire into an affine circuit, or leave it bearithmetic-circuits2Turn an affine circuit into a wire, or leave it bearithmetic-circuits;Translate an arithmetic expression to an arithmetic circuitarithmetic-circuits!Apply function to variable names.arithmetic-circuitsnumber of bits to truncate toarithmetic-circuitsnumber of bits to rotate byarithmetic-circuitsvariable lookuparithmetic-circuitsexpression to evaluatearithmetic-circuits input valuesarithmetic-circuitsresulting valuearithmetic-circuitsexpression to compilearithmetic-circuits.Wire to assign the output of the expression to##None&'_xw arithmetic-circuitsConvert constant to expressionarithmetic-circuits+Binary arithmetic operations on expressionsarithmetic-circuits+Binary arithmetic operations on expressionsarithmetic-circuits+Binary arithmetic operations on expressionsarithmetic-circuits]Binary logic operations on expressions Have to use underscore or similar to avoid shadowing and and or from Prelude/Protolude.arithmetic-circuits]Binary logic operations on expressions Have to use underscore or similar to avoid shadowing and and or from Prelude/Protolude.arithmetic-circuits]Binary logic operations on expressions Have to use underscore or similar to avoid shadowing and and or from Prelude/Protolude.arithmetic-circuitsNegate expressionarithmetic-circuitsCompare two expressionsarithmetic-circuitsConvert wire to expressionarithmetic-circuits:Return compilation of expression into an intermediate wirearithmetic-circuits$Conditional statement on expressionsarithmetic-circuits4Return compilation of expression into an output wire None&'_yEL !"#$%&'()*+,-Safe&'_z Safe&'_{YNone"#&'4679=?JPX_arithmetic-circuits5Generalised quadratic arithmetic program: instead of Poly, allow any functor.arithmetic-circuitsQuadratic arithmetic programarithmetic-circuits|The sets of polynomials/constants as they occur in QAPs, grouped into their constant, input, output and intermediate parts.arithmetic-circuitsFCreate QapSet with only a constant value and empty maps for the rest.arithmetic-circuits)Sum all the values contained in a QapSet.arithmetic-circuits'Sum only over constant and input valuesarithmetic-circuits,Sum only over intermediate and output valuesarithmetic-circuitsHFold over a QapSet with an operation that is assumed to be commutative.arithmetic-circuitsKVerify whether an assignment of variables is consistent with the given QAParithmetic-circuitsgProduce the polynomial witnessing the validity of given assignment against the given QAP. Will return Nothing! if the assignment is not valid.In Pinocchio's terminology: this produces the h(x) such that p(x) = h(x) * t(x) where t(x) is the target polynomial and p(x) is the left input polynomials times the right input polynomials minus the output polynomials.arithmetic-circuits1Lookup the value at the given wire label in the QapSet.arithmetic-circuits1Update the value at the given wire label in the QapSet#. (Partial function at the moment.)arithmetic-circuitsUpdate at multiple wiresarithmetic-circuits<Convert a single multiplication- or equality-gate into a QAParithmetic-circuitsUConvert a single multiplication gate (with affine circuits for inputs) into a GenQAParithmetic-circuitsFor the left input right inputoutput polynomials: turn list of coordinates into a polynomial that interpolates the coordinates. For the target polynomial: define it as the product of all monics t_g(x) := x - r_g where r_g is the root corresponding to the gate g.Naive construction of polynomials using Lagrange interpolation This has terrible complexity at the moment. Use the FFT-based approach if possible.arithmetic-circuitsKCreate polynomials using FFT-based polynomial operations instead of naive.arithmetic-circuits|Convert an arithmetic circuit into a GenQAP: perform every step of the QAP translation except the final interpolation step.arithmetic-circuits(Convert an arithmetic circuit into a QAParithmetic-circuits(Convert an arithmetic circuit into a QAParithmetic-circuitsAdd zeroes for those roots that are missing, to prevent the values in the GenQAP to be too sparse. (We can be sparse in wire values, but not in values at roots, otherwise the interpolation step is incorrect.)arithmetic-circuits.Generate a valid assignment for a single gate.arithmetic-circuits#function to combine the values witharithmetic-circuitsdefault left valuearithmetic-circuitsdefault right valuearithmetic-circuits left QapSetarithmetic-circuits right QapSetarithmetic-circuits#function to combine the values witharithmetic-circuitsdefault left valuearithmetic-circuitsdefault right valuearithmetic-circuits left QapSetarithmetic-circuits right QapSetarithmetic-circuits#function to combine the values witharithmetic-circuitsdefault left valuearithmetic-circuitsdefault right valuearithmetic-circuitsdefault constantarithmetic-circuits left QapSetarithmetic-circuits right QapSetarithmetic-circuitscommutative* binary operationarithmetic-circuitsQapSet to fold overarithmetic-circuits*circuit whose evaluation we want to verifyarithmetic-circuits]vector containing the inputs, outputs and intermediate values (outputs of all the mul-gates)arithmetic-circuits*circuit whose evaluation we want to verifyarithmetic-circuits]vector containing the inputs, outputs and intermediate values (outputs of all the mul-gates)arithmetic-circuits*circuit whose evaluation we want to verifyarithmetic-circuits]vector containing the inputs, outputs and intermediate values (outputs of all the mul-gates)arithmetic-circuitsarbitrarily chosen rootsarithmetic-circuitscircuit to encode as a QAParithmetic-circuitsarbitrarily chosen rootsarithmetic-circuitscircuit to encode as a QAParithmetic-circuits:function that gives us the primitive 2^k-th root of unityarithmetic-circuits9GenQAP containing the coordinates we want to interpolatearithmetic-circuits+arbitrarily chosen roots, one for each gatearithmetic-circuitscircuit to encode as a QAParithmetic-circuits+arbitrarily chosen roots, one for each gatearithmetic-circuitscircuit to encode as a QAParithmetic-circuits:function that gives us the primitive 2^k-th root of unityarithmetic-circuits+arbitrarily chosen roots, one for each gatearithmetic-circuitscircuit to encode as a QAParithmetic-circuitsprogramarithmetic-circuitsinputsarithmetic-circuitsinputsarithmetic-circuitsprogramarithmetic-circuitsinputs%%    !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNNOPQRSTUUVWXYYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~     2         /arithmetic-circuits-0.2.0-6zOfGRHnhI9W2wAnMDkNUCircuit.AffineCircuit.ArithmeticCircuit.Bulletproofs Circuit.Dot Circuit.Expr Circuit.LangFreshQAPCircuitPaths_arithmetic_circuits AffineCircuitAdd ScalarMul ConstGateVarcollectInputsAffine mapVarsAffineevalAffineCircuitaffineCircuitToAffineMap evalAffineMap dotProduct$fPrettyAffineCircuit$fReadAffineCircuit$fEqAffineCircuit$fShowAffineCircuit$fGenericAffineCircuit$fNFDataAffineCircuit$fFromJSONAffineCircuit$fToJSONAffineCircuit ArithCircuitGateMulEqualSplitmulLeftmulRight mulOutputeqInputeqMagiceqOutput splitInput splitOutputsWire InputWireIntermediateWire OutputWirecollectInputsGate outputWires mapVarsGateevalGatevalidArithCircuit fetchVars generateRootsevalArithCircuitunsplit $fPrettyWire $fPrettyGate$fPrettyArithCircuit $fShowWire$fEqWire $fOrdWire $fGenericWire $fNFDataWire $fToJSONWire$fFromJSONWire $fShowGate$fEqGate $fGenericGate $fNFDataGate$fFromJSONGate $fToJSONGate$fEqArithCircuit$fShowArithCircuit$fGenericArithCircuit$fNFDataArithCircuit$fFromJSONArithCircuit$fToJSONArithCircuit SetupProof assignment pedersenscircuitwitnessnmGateConstraintgcLinearConstraintLeftgcLinearConstraintRightgcMulConstraintLinearConstraint lcWeightsLeftlcWeightsRight lcWeightsOut lcWeightsIn lcConstantAltArithCircuit rewireCircuittransformInputsrewire evalCircuitcircuitToConstraintscomputeBulletproofsAssignment setupProof$fPrettyAltWire$fPrettyAltArithCircuit$fPrettyLinearConstraint$fPrettyMulConstraint$fPrettyGateConstraint $fShowAltWire $fEqAltWire $fOrdAltWire$fGenericAltWire$fNFDataAltWire$fFromJSONAltWire$fToJSONAltWire$fShowAltArithCircuit$fGenericAltArithCircuit$fNFDataAltArithCircuit$fFromJSONAltArithCircuit$fToJSONAltArithCircuit$fShowLinearConstraint$fGenericLinearConstraint$fFromJSONLinearConstraint$fToJSONLinearConstraint$fShowMulConstraint$fGenericMulConstraint$fFromJSONMulConstraint$fToJSONMulConstraint$fShowGateConstraint$fGenericGateConstraint$fFromJSONGateConstraint$fToJSONGateConstraint$fShowAssignment$fGenericAssignment$fFromJSONAssignment$fToJSONAssignment$fShowPedersens$fGenericPedersens$fNFDataPedersens$fShowSetupProof$fGenericSetupProof$fNFDataSetupProofarithCircuitToDot dotWriteSVGExprMExprEConst EConstBoolEVarEVarBoolEUnOpEBinOpEIfEEqBinOpBAddBSubBMulBAndBOrBXorUnOpUNegUNotURot truncRotateevalExprexecCircuitBuilderevalCircuitBuilderrunCircuitBuilderimm freshInput freshOutputemit rotateListaddVaraddWirecompileexprToArithCircuit $fPrettyUnOp $fPrettyBinOp $fPrettyExpr $fShowUnOp $fShowBinOp $fShowExprcaddsubmuland_or_xor_not_eqderefecondretinputFreshT evalFreshfresh qapInputsLeftqapInputsRight qapOutputs qapTargetQapSetqapSetConstant qapSetInputqapSetIntermediate qapSetOutput cnstInpQapSet sumQapSetsumQapSetCnstInpsumQapSetMidOutcombineWithDefaultscombineInputsWithDefaultscombineNonInputsWithDefaults foldQapSetverifyAssignmentverificationWitnessverificationWitnessZk lookupAtWire updateAtWire gateToQAP gateToGenQAPcreatePolynomialscreatePolynomialsFFTarithCircuitToGenQAParithCircuitToQAParithCircuitToQAPFFTaddMissingZeroesgenerateAssignmentGate initialQapSetgenerateAssignment qapSetToMap $fPrettyRatio$fFromJSONPrime $fToJSONPrime$fFromJSONPoly $fToJSONPoly$fPrettyQapSet $fPrettyQAP$fFunctorGenQAP$fPrettyGenQAP $fShowQapSet $fEqQapSet$fFunctorQapSet$fFoldableQapSet$fGenericQapSet$fNFDataQapSet$fToJSONQapSet$fFromJSONQapSet $fShowQAP$fEqQAP $fGenericQAP $fNFDataQAP $fToJSONQAP $fFromJSONQAP $fShowGenQAP $fEqGenQAP$fGenericGenQAP$fNFDataGenQAP$fToJSONGenQAP$fFromJSONGenQAP AssignmentassignmentLeftassignmentRight assignmentOut assignmentInmcLeftmcRightmcOutAltWiregateToConstraintsmulToImm mapVarsExprversion getBinDir getLibDir getDynLibDir getDataDir getLibexecDir getSysconfDirgetDataFileNameGenQAPconstantQapSet updateAtWires