f      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~  Safe-Inferred0Possible ways the input string can be malformed.8Is the given string a valid number with no other tokens?2Tries to read a word, giving an error if it fails.  Safe-Inferred )Each F18A instruction, ordered by opcode.)/The 18-bit word type used by Greenarrays chips.*;The names of the different instructions, ordered by opcode.+All of the opcodes, in order.,ATries to read a given string as an opcode from the list of names.-6Converts a word to an opcode. The word has to be < 32..5Converts an Opcode to its 18-bit word representation./MReturns whether the given opcode is a jump instruction expecting an address.0)Can the given opcode go in the last slot?1Estimates how long a given opcode will take to execute. Normal opcodes take 1.5 nanoseconds where ones that access the memory take 5 nanoseconds.,  !"#$%&'()*+,-./0123*  !"#$%&'()*+,-./01,)('&%$#"!  *+3,2-./01  ('&%$#"!  )*+,-./0123None244&A program in the F18A instruction set.5yRepresents a word in memory. This word can either contain opcodes, opcodes and a jump address or just a constant number.;Splits a list into chunks of at most four, breaking off a chunk whenever it sees an element matching the given predicate. This is useful for splitting a program along word boundaries, accounting for jump addresses.<;Read a whole program, splitting instructions up into words.=cReturns the given instructions as an actual word. This assumes the address is sized appropriately.>$Reads in a word as a set of opcodes.?eReturns the opcodes in the given instruction word. A constant corresponds to not having any opcodes.@Estimates the running time of the program in nanoseconds. This is based on the numbers provided in the manual: faster instructions take 1.5 nanoseconds and slower ones take 5. For now, this estimate ignores control flow like ifs and loops.456789:;<=>?@ABC 456789:;<=>?@5:9876C4;<BA=>?@ 45:9876;<=>?@ABCNoneEA stack containing only 0s.FJPushes the given element on top of the stack, discarding the last element.GAPops the top of the stack, returning the value and the new stack.H2Push the given elements onto the stack one-by-one.DEFGHDEFGHEFGHDDEFGH Safe-InferredAI#The four possible port directions. NA channel representing the four communication directions a core may use. In practice, these will either be hooked up to other cores or to IO. Nothing represents no message; if there is a word, execution will block.TDAn empty channel has no reads or writes and doesn't block execution.UWrite to the ports specified by the given memory address. This will clear all the channels not being written to (by setting them to Nothing).The ports to use are specified by bits 5 8 of the address. These bits correspond respectively to up, left, down and right. Bits 5 and 7 are inverted 0 turns the channel *on*.VkRead the inputs from the ports specified by the given address. The address is handled the same way as in U . Returns Nothing if blocked on the read.If more than one of the read ports has data, this currently just chooses the first one based on the right, down, left, up order. I don't know if this is the correct behavior perhaps I should just xor them together or something?IJKLMNOPQRSTU6The address to write to. Only bits 5 8 are considered.!The word to write to the channel.3The resulting channel, with any unused ports empty.VWIJKLMNOPQRSTUVNOPQRSIMLKJWTUVIMLKJNOPQRSTUVWNoneXA state representing the registers, stacks, memory and communication channels of a core. Note that all the fields are strict; they should also be unboxed thanks to -funbox-strict-fields (set in the .cabal file).^For now, this is just a record; however, I might rewrite it to use lenses in the near future.`the i register can be Nothing+ if it is blocked on a communication port.dSThe chip's RAM, ROM and IO channels. The RAM and ROM should each contain 64 words.For now, input and output is split into two different types, even though they're combined on the physical chip. I'm simply not sure how to handle the case that both chips simultaneously write to the same channel.jNMemory with RAM and ROM zeroed out and nothing on the communication channels.kThe number of words in memory. Both ram and rom are this size. For some reason, the ram and rom address spaces are *double* this size respectively, wrapping around at the half-way point.lXThe state corresponding to a core with no programs loaded and no instructions executed.mIncrement the p register for the given state. If p is in RAM or ROM, this wraps p as appropriate. If p is in IO, this does nothing and p remains unchanged.nFThe next word of instructions to execute in the given state. Returns Nothing if p( is blocked on a communication channel.o1Pops the data stack of the given state, updating s and t.p*Push a word onto the data stack, updating s and t.q3Pops the return stack of the given state, updating r.r,Push a word onto the return stack, updating r.seForce an address to be in range of memory: [0,64), also converting between different integral types.t>Read the memory at a location given by a Forth word. Returns Nothing' if blocked on a communication channel.uSet the memory using Forth words. A state with anything in the output channel remains blocked until one of the active ports is read.vvIs the state is blocked because it has written to a port? Note that this does *not* consider being blocked on a read!wDLoads the given program into memory at the given starting position.xJLoad the given memory words into the state starting at the given address.y'Sets the input value at the given port.#XYZ[\]^_`abcdefghijklmnopqrstuvwxyz"XYZ[\]^_`abcdefghijklmnopqrstuvwxy#defghijkXYZ[\]^_`abczlmnopqrstuvwxyX YZ[\]^_`abcdefghijklmnopqrstuvwxyzNoneA{>A trace of a progam is the state after every word is executed.|Runs a single word's worth of instructions starting from the given state, returning the intermediate states for each executed opcode.}LRuns a single word's worth of instructions, returning only the final state.~wExecutes a single word in the given state, incrementing the program counter and returning all the intermediate states.PExecutes a single word in the given state, returning the last resulting state.q?Trace the given program, including all the intermediate states.jReturns a trace of the program's execution. The trace is a list of the state of the chip after each step.9Trace a program until it either hits four nops or all 0s.TRuns the program unil it hits a terminal state, returning only the resulting state.zExecutes the specified program on the given state until it hits a "terminal" word--a word made up of four nops or all 0s.0Estimates the execution time of a program trace.ZChecks that the program trace terminated in at most n steps, returning Nothing otherwise.?Does the given opcode cause the current word to stop executing?OExtends the given trace by a single execution step. The trace cannot be empty.gExecutes an opcode on the given state. If the state is blocked on some communication, nothing changes.0Execute a jump instruction to the given address.{|}~{|}~{|}~{|}~None24:Counts the number of bits that differ between two numbers.Return a distance function that counts the different bits between the given registers. You could use it like `compareRegisters [s, t]`._Returns a distance function that counts the different bits between the given memory locations.aReturns a score that counts the number of matching states according to some projection function. None24 3A program to be manipulated by the MCMC synthesizerRepresents a single instruction as viewed by the synthesizer. This can be an opcode, a numeric literal or a token representing an unused slot.wTries to parse the given string as an instruction, which can either be a number, an opcode or "_" representing Unused.,Reads a program in the synthesizer's format.Takes a program as handled by the synthesizer and makes it native by turning literal numbers into @p and fixing any issues with instructions going into the last slot as well as prepending nops before + instructions.,Does this instruction force a word boundary?ZResolves labels into addresses, assuming the program starts at the given memory location.QInsert extra nops to account for instructions that cannot go into the last slot.TGets a synthesizer program from a native program. Currently does not support jumps.5Runs a given program from the default starting state.CLoads the given synthesizer-friendly program into the given state. None24MHA score type that contains a correctness value and a performance value.iCreates an evaluation function from a spec, a set of inputs and a function for comparing program traces.PUsing a given correctness measure, produce a score also containing performance.Given a specification program and some inputs, evaluate a program against the specification for both performance and correctness. Normalize the score based on the number of test cases.The default distribution of instructions. For now, we do not support any sort of jumps. All the other possible instructions along with constant numbers and unused slots are equally likely. The numeric value of constants is currently a uniform distribution over 18-bit words.The default mutations to try. For now, this will either change an instruction or swap two instructions in the program, with equal probability.  None(*AJKM~The address of a core. There are 144 cores in an 8 18 array. The address has the row number followed by the column number.~As a string, the core addresses are displayed as a single three-digit number, just like in the GreenArray documentation. So  Core 7 17 becomes "717".fCore addresses behave like numbers: you can use numeric literals and add them together. For example, [0..] :: [Core]/ gets you the list of all the core addresses. (move core = core + Core 1 1)7 is a function that moves you up and over by one core.Returns all the neighbors of a core. Most cores have four neighbors; the ones along the edges only have three and the ones at the corners two.aThey always come in the order right, down, left up, with Nothing in place of non-existant cores.   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEAFGHIJKLMNOPQRSTUVWXYYZ[\]^_`abbcdefghijklmmnopqrstuvwxyz{|}~           L M     Oarray-forth-0.2.1.4Language.ArrayForth.ParseLanguage.ArrayForth.Opcode!Language.ArrayForth.NativeProgramLanguage.ArrayForth.StackLanguage.ArrayForth.ChannelLanguage.ArrayForth.StateLanguage.ArrayForth.InterpreterLanguage.ArrayForth.DistanceLanguage.ArrayForth.ProgramLanguage.ArrayForth.SynthesisLanguage.ArrayForth.Core ParseError BadNumberNoAddrNotJumpNotSlot3 BadOpcodeisNumberreadWordOpcodeSetASetBPushNopReadAOverPopDupDropOrAndPlusNotDiv2Times2 MultiplyStepStoreStoreB StorePlusStorePFetchFetchB FetchPlusFetchPMinusIfIfNextUnextCallJmpExecRetF18Wordnamesopcodes readOpcodetoOpcode fromOpcodeisJumpslot3 opcodeTime $fReadOpcode $fShowOpcode NativeProgramInstrsConstantJump1Jump2Jump3 splitWordsreadNativeProgramtoBitsfromBits toOpcodes runningTime $fIsString[]$fRead[] $fShowInstrsStackemptypushpopfillPortULDRChannelrightdownleftup emptyChannel writePortreadPort$fMonoidChannelStateabprsti dataStack returnStackmemoryMemoryramrominputoutputemptyMemmemSize startStateincrPnextdpopdpushrpoprpushtoMem!setblocked setProgram loadMemory sendInput $fShowStateTracewordAllwordstepAllsteptraceAll traceProgram stepProgramevalrunNativeProgram countTimethrottleendWordrunexecutejumpDistance countBits registers locationsmatching $fScoreSumProgram InstructionUnusedLabelNumberJumpAddrAbstractConcretereadInstruction readProgramtoNativeboundarylabelsfixSlot3 fromNative runProgramload$fShowInstruction $fShowAddr DefaultScoretracewithPerformanceevaluate defaultOpspairs removePairsdefaultMutations$fRandomOddWord$fMonoidDefaultScore$fShowDefaultScore$fScoreDefaultScoreCore neighbors $fNumCore $fBoundedCore $fEnumCore $fShowCore$fShowParseError $fShowStack