úθ˜      Safe-Inferred ,Atomic bit operations on a memory location.  Instances: , , , , , , , , , .Atomic (+), returning the original value.Atomic (-) , returning the originial value.Atomic (.|.), returning the original value.Atomic (.&.), returning the original value.Atomic xor, returning the original value.Atomic nand, returning the original value.Atomic (+), returning the updated value.Atomic (-), returning the updated value. Atomic (.|.), returning the updated value. Atomic (.&.), returning the updated value. Atomic xor, returning the updated value. Atomic nand, returning the updated value. Atomic CAS with boolean return.Atomic CAS, returning the original value.aAtomically update the memory location with the value 1 and return the original value, 0 in case  was previously called or 1 if another call to ' aquired the lock earlier. Implies an aquire barrier.Release the lock by writing a 0 . Includes a release barrier.A full memory barrier.l The memory location to update Old valueIntended new value if swapped,  otherwiseThe memory location to update Old valueIntended new valueOriginal value !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvw  \  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwx      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~bits-atomic-0.1.1Data.Bits.Atomic AtomicBits fetchAndAdd fetchAndSub fetchAndOr fetchAndAnd fetchAndXor fetchAndNand addAndFetch subAndFetch orAndFetch andAndFetch xorAndFetch nandAndFetchcompareAndSwapBoolcompareAndSwaplockTestAndSet lockRelease memoryBarrierghc-prim GHC.TypesWordbaseGHC.WordWord8Word16Word32Word64IntGHC.IntInt8Int16Int32Int64TrueFalselock_release_wordlock_test_and_set_wordval_compare_and_swap_wordbool_compare_and_swap_wordnand_and_fetch_wordxor_and_fetch_wordand_and_fetch_wordor_and_fetch_wordsub_and_fetch_wordadd_and_fetch_wordfetch_and_nand_wordfetch_and_xor_wordfetch_and_and_wordfetch_and_or_wordfetch_and_sub_wordfetch_and_add_wordlock_release_64lock_test_and_set_64val_compare_and_swap_64bool_compare_and_swap_64nand_and_fetch_64xor_and_fetch_64and_and_fetch_64or_and_fetch_64sub_and_fetch_64add_and_fetch_64fetch_and_nand_64fetch_and_xor_64fetch_and_and_64fetch_and_or_64fetch_and_sub_64fetch_and_add_64lock_release_32lock_test_and_set_32val_compare_and_swap_32bool_compare_and_swap_32nand_and_fetch_32xor_and_fetch_32and_and_fetch_32or_and_fetch_32sub_and_fetch_32add_and_fetch_32fetch_and_nand_32fetch_and_xor_32fetch_and_and_32fetch_and_or_32fetch_and_sub_32fetch_and_add_32lock_release_16lock_test_and_set_16val_compare_and_swap_16bool_compare_and_swap_16nand_and_fetch_16xor_and_fetch_16and_and_fetch_16or_and_fetch_16sub_and_fetch_16add_and_fetch_16fetch_and_nand_16fetch_and_xor_16fetch_and_and_16fetch_and_or_16fetch_and_sub_16fetch_and_add_16lock_release_8lock_test_and_set_8val_compare_and_swap_8bool_compare_and_swap_8nand_and_fetch_8xor_and_fetch_8and_and_fetch_8or_and_fetch_8sub_and_fetch_8add_and_fetch_8fetch_and_nand_8fetch_and_xor_8fetch_and_and_8fetch_and_or_8fetch_and_sub_8fetch_and_add_8$fAtomicBitsInt64$fAtomicBitsInt32$fAtomicBitsInt16$fAtomicBitsInt8$fAtomicBitsInt$fAtomicBitsWord$fAtomicBitsWord64$fAtomicBitsWord32$fAtomicBitsWord16$fAtomicBitsWord8