clash-prelude-0.6.0.1: CAES Language for Synchronous Hardware - Prelude library

Safe HaskellNone
LanguageHaskell2010

CLaSH.Prelude.BitReduction

Synopsis

Documentation

reduceAnd :: (BitPack a, KnownNat (BitSize a)) => a -> Bit Source

Are all bits set to '1'?

>>> pack (-2 :: Signed 6)
111110
>>> reduceAnd (-2 :: Signed 6)
0
>>> pack (-1 :: Signed 6)
111111
>>> reduceAnd (-1 :: Signed 6)
1

reduceOr :: BitPack a => a -> Bit Source

Is there at least one bit set to '1'?

>>> pack (5 :: Signed 6)
000101
>>> reduceOr (5 :: Signed 6)
1
>>> pack (0 :: Signed 6)
000000
>>> reduceOr (0 :: Signed 6)
0

reduceXor :: BitPack a => a -> Bit Source

Is the number of bits set to '1' uneven?

>>> pack (5 :: Signed 6)
000101
>>> reduceXor (5 :: Signed 6)
0
>>> pack (28 :: Signed 6)
011100
>>> reduceXor (28 :: Signed 6)
1
>>> pack (-5 :: Signed 6)
111011
>>> reduceXor (-5 :: Signed 6)
1