clash-prelude: CAES Language for Synchronous Hardware - Prelude library

[ bsd2, hardware, library ] [ Propose Tags ]

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed, but with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

This package provides:

  • Prelude library containing datatypes and functions for circuit design

To use the library:

A preliminary version of a tutorial can be found in Clash.Tutorial, for a general overview of the library you should however check out Clash.Prelude. Some circuit examples can be found in Clash.Examples.


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Flags

Manual Flags

NameDescriptionDefault
large-tuples

Generate instances for classes such as NFDataX and BitPack for tuples up to and including 62 elements - the GHC imposed maximum. This greatly increases compile times for `clash-prelude` and therefore mostly impacts the Clash developers themselves. Hence its default is set to disabled on development versions and enabled on releases.

Enabled
super-strict

Use deepseqX (instead of seqX) in register-like constructs. This can help to eliminate space leaks when using lazy data structures in registers-like constructs. This potentially slows down Clash hardware simulation.

Disabled
strict-mapsignal

Use seqX in mapSignal#. This can help to eliminate space leaks in long running simulations.

Disabled
multiple-hidden

Allow multiple hidden clocks, resets, and enables to be used. This is an experimental feature, possibly triggering confusing error messages. By default, it is enabled on development versions of Clash and disabled on releases.

Disabled
doctests

You can disable testing with doctests using `-f-doctests`.

Enabled
unittests

You can disable testing with unittests using `-f-unittests`.

Enabled
benchmarks

You can disable testing with benchmarks using `-f-benchmarks`.

Enabled

Use -f <flag> to enable a flag, or -f -<flag> to disable that flag. More info

Downloads

Versions [RSS] 0.2, 0.3, 0.4, 0.5, 0.5.0.1, 0.5.1, 0.6, 0.6.0.1, 0.7, 0.7.1, 0.7.2, 0.7.3, 0.7.4, 0.7.5, 0.8, 0.8.1, 0.9, 0.9.1, 0.9.2, 0.9.3, 0.10, 0.10.1, 0.10.2, 0.10.3, 0.10.4, 0.10.5, 0.10.6, 0.10.7, 0.10.8, 0.10.9, 0.10.10, 0.10.11, 0.10.13, 0.10.14, 0.11, 0.11.1, 0.11.2, 0.99, 0.99.1, 0.99.2, 0.99.3, 1.0.0, 1.0.1, 1.2.0, 1.2.1, 1.2.2, 1.2.3, 1.2.4, 1.2.5, 1.4.0, 1.4.1, 1.4.2, 1.4.3, 1.4.4, 1.4.5, 1.4.6, 1.4.7, 1.6.0, 1.6.1, 1.6.2, 1.6.3, 1.6.4, 1.6.5, 1.6.6, 1.8.0, 1.8.1 (info)
Change log CHANGELOG.md
Dependencies array (>=0.5.1.0 && <0.6), base (>=4.11 && <5), bifunctors (>=5.4.0 && <6.0), binary (>=0.8.5 && <0.11), bytestring (>=0.10.8 && <0.11), constraints (>=0.9 && <1.0), containers (>=0.4.0 && <0.7), data-binary-ieee754 (>=0.4.4 && <0.6), data-default-class (>=0.1.2 && <0.2), deepseq (>=1.4.1.0 && <1.5), ghc-prim (>=0.5.1.0 && <0.7), ghc-typelits-extra (>=0.3.3 && <0.5), ghc-typelits-knownnat (>=0.7.2 && <0.8), ghc-typelits-natnormalise (>=0.7.2 && <0.8), half (>=0.2.2.3 && <1.0), hashable (>=1.2.1.0 && <1.4), integer-gmp (>=0.5.1.0 && <1.1), interpolate (>=0.2 && <0.3), lens (>=4.10 && <4.20), QuickCheck (>=2.7 && <2.15), recursion-schemes (>=5.1 && <5.2), reflection (>=2 && <2.2), singletons (>=1.0 && <3.0), template-haskell (>=2.12.0.0 && <2.17), text (>=0.11.3.1 && <1.3), text-show (>=3.8 && <3.9), th-abstraction (>=0.2.10 && <0.4.0), th-lift (>=0.7.0 && <0.9), th-orphans (>=0.13.1 && <1.0), time (>=1.8 && <1.11), transformers (>=0.5.2.0 && <0.6), type-errors (>=0.2.0.0 && <0.3), uniplate (>=1.6.12 && <1.7), vector (>=0.11 && <1.0) [details]
License BSD-2-Clause
Copyright Copyright © 2013-2016, University of Twente, 2016-2017, Myrtle Software Ltd, 2017-2019, QBayLogic B.V., Google Inc.
Author The Clash Authors
Maintainer QBayLogic B.V. <devops@qbaylogic.com>
Category Hardware
Home page https://clash-lang.org/
Bug tracker https://github.com/clash-lang/clash-compiler/issues
Source repo head: git clone https://github.com/clash-lang/clash-compiler.git(clash-prelude)
Uploaded by QBayLogic at 2020-07-11T19:21:12Z
Distributions Arch:1.8.1, LTSHaskell:1.8.1, Stackage:1.8.1
Reverse Dependencies 17 direct, 2 indirect [details]
Downloads 48878 total (116 in the last 30 days)
Rating 2.5 (votes: 3) [estimated by Bayesian average]
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Status Docs uploaded by user
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Readme for clash-prelude-1.2.3

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Clash - A functional hardware description language

Pipeline status Hackage Hackage Dependencies

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed, yet with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

Support

For updates and questions join the mailing list clash-language+subscribe@googlegroups.com or read the forum