clash-prelude-1.5.0: Clash: a functional hardware description language - Prelude library
Copyright(C) 2015-2016 University of Twente
2017-2019 Myrtle Software Ltd
2017 Google Inc.
LicenseBSD2 (see the file LICENSE)
MaintainerChristiaan Baaij <christiaan.baaij@gmail.com>
Safe HaskellSafe
LanguageHaskell2010
Extensions
  • Cpp
  • MonoLocalBinds
  • ScopedTypeVariables
  • BangPatterns
  • TypeFamilies
  • ViewPatterns
  • DataKinds
  • InstanceSigs
  • StandaloneDeriving
  • DeriveDataTypeable
  • DeriveFunctor
  • DeriveTraversable
  • DeriveFoldable
  • DeriveGeneric
  • DefaultSignatures
  • DeriveLift
  • DerivingStrategies
  • FlexibleContexts
  • MagicHash
  • KindSignatures
  • TupleSections
  • TypeOperators
  • ExplicitNamespaces
  • ExplicitForAll
  • BinaryLiterals
  • TypeApplications

Clash.Prelude.RAM

Description

RAM primitives with a combinational read port.

Synopsis

RAM synchronized to an arbitrary clock

asyncRam Source #

Arguments

:: (Enum addr, HiddenClock dom, HiddenEnable dom, HasCallStack) 
=> SNat n

Size n of the RAM

-> Signal dom addr

Read address r

-> Signal dom (Maybe (addr, a))

(write address w, value to write)

-> Signal dom a

Value of the RAM at address r

Create a RAM with space for n elements.

Additional helpful information:

asyncRamPow2 Source #

Arguments

:: (KnownNat n, HiddenClock dom, HiddenEnable dom, HasCallStack) 
=> Signal dom (Unsigned n)

Read address r

-> Signal dom (Maybe (Unsigned n, a))

(write address w, value to write)

-> Signal dom a

Value of the RAM at address r

Create a RAM with space for 2^n elements

Additional helpful information: