| Copyright | (c) David Cox 2021 |
|---|---|
| License | BSD 3-Clause |
| Maintainer | standardsemiconductor@gmail.com |
| Safe Haskell | None |
| Language | Haskell2010 |
Ice40.Osc
Description
LFOSC and HFOSC hard IP primitive from Lattice Ice Technology Library
Synopsis
- lf10kHz :: Signal dom Bool -> Signal dom Bool -> Clock Lattice10kHz
- hf48Mhz :: KnownDomain dom => Signal dom Bool -> Signal dom Bool -> Clock Lattice48Mhz
- hf24Mhz :: KnownDomain dom => Signal dom Bool -> Signal dom Bool -> Clock Lattice24Mhz
- hf12Mhz :: KnownDomain dom => Signal dom Bool -> Signal dom Bool -> Clock Lattice12Mhz
- hf6Mhz :: KnownDomain dom => Signal dom Bool -> Signal dom Bool -> Clock Lattice6Mhz
Documentation
Arguments
| :: Signal dom Bool | CLKLFPU - Power up the LFOSC circuit. After power up, oscillator output will be stable after 100us. Active High. |
| -> Signal dom Bool | CLKLFEN - Enable the clock output. Enable should be low for the 100us power up period. Active High. |
| -> Clock Lattice10kHz | LF Oscillator output |
Low frequency oscillator 10 kHz
Arguments
| :: KnownDomain dom | |
| => Signal dom Bool | CLKHFEN Enable the clock output. Enable should be low for the 100us power up period. Active High. |
| -> Signal dom Bool | CLKHFPU Power up the HFOSC circuit. After power up, oscillator output will be stable after 100us. Active High. |
| -> Clock Lattice48Mhz | HF Oscillator output |
High frequency oscillator 48 Mhz
Arguments
| :: KnownDomain dom | |
| => Signal dom Bool | CLKHFEN Enable the clock output. Enable should be low for the 100us power up period. Active High. |
| -> Signal dom Bool | CLKHFPU Power up the HFOSC circuit. After power up, oscillator output will be stable after 100us. Active High. |
| -> Clock Lattice24Mhz | HF Oscillator output |
High frequency oscillator 24 Mhz
Arguments
| :: KnownDomain dom | |
| => Signal dom Bool | CLKHFEN Enable the clock output. Enable should be low for the 100us power up period. Active High. |
| -> Signal dom Bool | CLKHFPU Power up the HFOSC circuit. After power up, oscillator output will be stable after 100us. Active High. |
| -> Clock Lattice12Mhz | HF Oscillator output |
High frequency oscillator 12 Mhz
Arguments
| :: KnownDomain dom | |
| => Signal dom Bool | CLKHFEN Enable the clock output. Enable should be low for the 100us power up period. Active High. |
| -> Signal dom Bool | CLKHFPU Power up the HFOSC circuit. After power up, oscillator output will be stable after 100us. Active High. |
| -> Clock Lattice6Mhz | HF Oscillator output |
High frequency oscillator 6 Mhz