h*v      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~1.5.0.0  Safe-Inferred )*<> io-simThe identifier of this var.io-simLabel.io-simThe var's current valueio-simA stack of undo values. This is only used while executing a transaction.io-simThread Ids of threads blocked on a read of this var. It is represented in reverse order of thread wakeup, without duplicates.To avoid duplicates efficiently, the operations rely on a copy of the thread Ids represented as a set.io-sim&The vector clock of the current value.io-simCallback to construct a trace which will be attached to the dynamic trace.io-simExecution step in IOSimPOR is identified by the thread id and a monotonically increasing number (thread specific).io-sim A thread id.IOSimPOR:  indicates that this thread is taken into account when discovering races. A thread is marked as racy iff > was executed in it or it's a thread forked by a racy thread.io-simA racy thread (IOSimPOR only), shown in the trace with curly braces, e.g. `Thread {2,3}`.io-simA non racy thread. They have higher priority than racy threads in IOSimPOR scheduler./ Safe-InferredY1 Safe-Inferred gio-sim#An exception thrown to a thread by ' to interrupt a timed-out computation.io-simunsafeTimeout n a forces the evaluation of a, with a time limit of n microseconds.io-sim  Safe-Inferred'_io-simAs we execute a simulation, we collect information about each step. This information is updated as the simulation evolves by  .io-sim7Step that we want to reschedule to run after a step in 8 (there will be one schedule modification per step in ).io-sim.Control information when we reached this step.io-sim1Threads that are still concurrent with this step.io-simSteps following this one that did not happen after it (in reverse order).io-simLater steps that race with .io-sim9A schedule modification inserted at given execution step.io-simStep at which the  is activated.io-sim + at the activation step. It is needed by extendScheduleControl> when combining the discovered schedule with the initial one.io-simSeries of steps which are executed at the target step. This *includes* the target step, not necessarily as the last step. io-simModified execution schedule. io-simdefault scheduling mode io-simif the current control is  , the normal scheduling will proceed, until the thread found in the first  reaches the given step. At this point the thread is put to sleep, until after all the steps are followed. io-simfollow the steps then continue with schedule modifications. This control is set by  followControl when controlTargets returns true.io-simAn  aggregates effects performed by a thread in a given execution step. Only used by *IOSimPOR*.io-simCheck if two effects race. The two effects are assumed to come from different threads, from steps which do not wake one another, see  racingSteps.-   Safe-Inferred  Safe-Inferred gio-sim A default  MonadMVar implementation is based on 's. An MVar guarantees fairness.Implementation details: does not guarantee fairness, instead it provide compositionally. Fairness of  and < is provided by tracking queue of blocked operation in the , e.g. when a  is scheduled on a full , the request is put on to the back of the queue together with a wakeup var. When  executes, it returns the value and is using the first element of the queue to set the new value of the  and signals next  operation to unblock. This has an effect as if all the racing  calls where executed in turns. Note that readMVar has interesting semantics: it is guaranteed to read the next value put using putMVar, and all readers will wake up, not just the first. To support this, the implementation uses two queues in the empty MVar case: one for threads blocked on takeMVar", and one for threads blocked on readMVar. The putMVar< has to wake up all readers and the first "taker" (if any).io-sim when the ' is empty, guarantees to receive next putMVar' value. It will also not block if the 9 is full, even if there are other threads attempting to putMVar.* Safe-Inferred9 io-simA cons list with polymorphic nil.  Void a is an infinite stream  () a is isomorphic to [a]Usually used with a being a non empty sum type.io-simPretty print a  .io-simio-simthrow asynchronous exception ()?io-simthe thread which executed  is blocked@io-simthe thread which executed  is woken upAio-sima target thread of / unmasked its exceptions, this is paired with @# for threads which were blocked on Bio-simforked a threadCio-simthread terminated normallyDio-sim+thread terminated by an unhandled exceptionEio-simcommitted STM transactionGio-sim STM transaction blocked (due to )Hio-simchanged vars causing retryIio-sim0unblocked threads by a committed STM transactionJio-simthread delayedKio-simthread woken up after a delayLio-simnew timeout created (via )Mio-sim timeout firedNio-simregistered delay (via )Oio-simregistered delay firedPio-sima new r created (via )Qio-sima r was cancelled (via )Rio-sima r firedSio-simevent traced when  threadStatus is executedTio-simIOSimPOR; event: new execution started exploring the given schedule.Uio-simIOSimPOR event: the labelling thread was runnable, but its execution was delayed, until V.Event inserted to mark a difference between a failed trace and a similar passing trace.Vio-simIOSimPOR1 event: marks when the thread was rescheduled by IOSimPORWio-simIOSim and IOSimPOR event: a thread was descheduledXio-simIOSimPOR event: following given scheduleYio-simIOSimPOR3 event: thread delayed to follow the given scheduleZio-simIOSimPOR( event: perform action of the given step[io-simIOSimPOR1 event: reschedule a thread following the given  \io-simIOSimPOR event: executed effect; Useful for debugging IOSimPOR or showing compact information about thread execution.]io-simIOSimPOR event: races. Races are updated while we execute a simulation. Useful for debugging IOSimPOR.^io-simA type alias for t; simulation trace. It comes with useful pattern synonyms._io-simA result type of a simulation.`io-sim Return value of the main thread.aio-sim$Exception thrown by the main thread.bio-simDeadlock discovered in the simulation. Deadlocks are discovered if simply the simulation cannot do any progress in a given time slot and there's no event which would advance the time.cio-simOnly returned by IOSimPOR) when a step execution took longer than 2 was exceeded.dio-simAn t bug, please report to )https://github.com/input-output-hk/io-simeio-simTrace0 is a recursive data type, it is the trace of a t computation. The trace will contain information about thread scheduling, blocking on 's, and other internal state changes of t. More importantly it also supports traces generated by the computation with  (which corresponds to using  in ),  traceEventM$, or dynamically typed traces with } (which generalise the base library )1It also contains information on discovered races. See also: , , ,  and .fio-simUsed when using t.gio-simOnly used for IOSimPORhio-simOnly used for IOSimPORnio-simWrapper for Eventlog markers so they can be retrieved from the trace with selectTraceEventsDynamic.pio-simWrapper for Eventlog events so they can be retrieved from the trace with selectTraceEventsDynamic.io-sim a timeoutio-sima negative timeoutsio-simt's  monad, as t it is parametrised by s, e.g.  STMSim s a is monadic expression of type a.}io-simt has the ability to store any 6 value in its trace which can then be recovered with selectTraceEventsDynamic or selectTraceEventsDynamic'.~io-sim"Trace a value, in the same was as } does, but from the 0 monad. This is primarily useful for debugging.io-simLift an  computation to t.Note: you can use  to lift < computations, this is a more convenient function just for t.io-sim>Set the current wall clock time for the thread's clock domain.io-simPut the thread into a new wall clock domain, not shared with the parent thread. Changing the wall clock time in the new clock domain will not affect the other clock of other threads. All threads forked by this thread from this point onwards will share the new clock domain.io-simPretty print a e.io-simPretty print simulation trace.Note: this is not a streaming function, it will evaluate the whole trace before printing it. If you need to print a very large trace, you might want to use  show ( 0 0 0)io-simLike $ but does not show the result value.io-simTrace each event using ; this is useful when a trace ends with a pure error, e.g. an assertion.io-sim6This provides access to (almost) everything from the  primitive# package, but don't try to use the MVar%s as that will not work as expected.io-simThis instance adds a trace when a variable was written, just after the stm transaction was committed.3Traces the first value using dynamic tracing, like } does, i.e. with  EventDynamic; the string is traced using :.io-simJust like the IO instance, we don't actually check anything hereio-sim written tvarsio-sim read tvarsio-sim created tvarsEio-simstm tx wrote to theseio-simand created theseio-simeffect performed (only for IOSimPOR1) | aborted an STM transaction (by an exception)For IOSimPOR it also holds performed effect.Gio-simeffect performed (only for IOSimPOR)Sio-simcurrent threadio-simqueried threadio-simwidth of the timeio-simwidth of thread idio-simwidth of thread labelt}~s ./01234-pqno9:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]efghijklm_b`acd^ |{yxwzvu5678r Safe-Inferred)*Dio-sim&Unsafe method which removes a timeout.It's not part of public API, and it might cause deadlocks when used in a wrong context.It is defined here rather so that it's not exposed to the user, even tough one could define it oneself.TODO: % constructors should be defined here.  Safe-Inferred%&'*Tio-simInternal state.io-simAll threads other than the currently running thread: both running and blocked threads.io-sim current timeio-sim#ordered list of timers and timeoutsio-simtimeout locks in order to synchronize the timeout handler and the main threadio-sim next unused io-sim next unused  | previous steps (which we may race with). Note this is *lazy*, so that we don't compute races we will not reverse.io-sim0control the schedule followed, and initial valueio-simlimit on the computation time allowed per scheduling step, for catching infinite loops etcio-sim.Timers mutable variables. First one supports  api, the second one , the third one .io-sim timer.io-sim registerDelay timer.io-sim threadDelay timer run by  which was assigned the given " (only used to report in a trace).io-simtimeout timer run by  which was assigned the given " (only used to report in a trace).io-sim-Interpret the simulation monotonic time as a  since the start.io-simInsert thread into .io-simSchedule / run a thread.io-simThis function receives a list of TimerTimeout values that represent threads for which the timeout expired and kills the running thread if needed.This function is responsible for the second part of the race condition issue and relates to the s  locking explanation (here is where the assassin threads are launched. So, as explained previously, at this point in code, the timeout expired so we need to interrupt the running thread. If the running thread finished at the same time the timeout expired we have a race condition. To deal with this race condition what we do is look at the lock value. If it is  this means that the running thread already finished (or won the race) so we can safely do nothing. Otherwise, if the lock value is  we need to acquire the lock and launch an assassin thread that is going to interrupt the running one. Note that we should run this interrupting thread in an unmasked state since it might receive a  ThreadKilled exception.io-simIterate through the control stack to find an enclosing exception handler of the right type, or unwind all the way to the top level for the thread.Also return if it's the main thread or a forked thread since we handle the cases differently.io-sim#The most general method of running t is in 6 monad. One can recover failures or the result from ^ with  traceResult , or access  TraceEvent$s generated by the computation with  traceEvents1. A slightly more convenient way is exposed by  runSimTrace.io-simSpecial case of % supporting only var reads and writesio-simTrace a . It must be called only on s that were new or 'written.io-simFor each TVar written to in a transaction (in order) collect the threads that blocked on each one (in order).Also, for logging purposes, return an association between the threads and the var writes that woke them.io-simCheck if two steps can be reordered with a possibly different outcome.io-sim&Step a thread and return the previous  and its .io-sim turns a current  into , and updates all .We take care that steps can only race against threads in their concurrent set. When this becomes empty, a step can be retired into the "complete" category, but only if there are some steps racing with it.io-siman earlier stepio-sim a later stepio-sim if we are blocked on STMio-siman earlier stepio-sim a later stept}~spqno5678^ {yxweghijklm_b`acd9:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]  Safe-Inferred'*_io-simInternal state.io-simAll threads other than the currently running thread: both running and blocked threads.io-sim current timeio-sim#ordered list of timers and timeoutsio-simlist of clocksio-sim next unused io-sim next unused io-sim#Timers mutable variables. Supports  api, the second one , the third one .io-sim timer.io-sim registerDelay timer.io-sim threadDelay timer run by  which was assigned the given " (only used to report in a trace).io-simtimeout timer run by  which was assigned the given " (only used to report in a trace).io-sim-Interpret the simulation monotonic time as a  since the start.io-simSchedule / run a thread.io-simThis function receives a list of TimerTimeout values that represent threads for which the timeout expired and kills the running thread if needed.This function is responsible for the second part of the race condition issue and relates to the s  locking explanation (here is where the assassin threads are launched. So, as explained previously, at this point in code, the timeout expired so we need to interrupt the running thread. If the running thread finished at the same time the timeout expired we have a race condition. To deal with this race condition what we do is look at the lock value. If it is  this means that the running thread already finished (or won the race) so we can safely do nothing. Otherwise, if the lock value is  we need to acquire the lock and launch an assassin thread that is going to interrupt the running one. Note that we should run this interrupting thread in an unmasked state since it might receive a  ThreadKilled exception.io-simIterate through the control stack to find an enclosing exception handler of the right type, or unwind all the way to the top level for the thread.Also return if it's the main thread or a forked thread since we handle the cases differently.4Also remove timeouts associated to frames we unwind.io-sim#The most general method of running t is in the lazy 6 monad. One can recover failures or the result from ^ with  , or access 9%s generated by the computation with 1. A slightly more convenient way is exposed by .io-simSpecial case of % supporting only var reads and writesio-simTrace a . It must be called only on s that were new or 'written.io-simFor each TVar written to in a transaction (in order) collect the threads that blocked on each one (in order).Also, for logging purposes, return an association between the threads and the var writes that woke them.t}~spqno5678^ |yxwefhijklm_b`acd9:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\] Safe-Inferred't!io-sim Simulation terminated a failure.io-sim-The main thread terminated with an exception.io-simThe threads all deadlocked.io-simThe main thread terminated normally but other threads were still alive, and strict shutdown checking was requested. See .io-simAn exception was thrown while evaluation the trace. This could be an internal assertion failure of `io-sim` or an unhandled exception in the simulation.io-sim%An internal failure of the simulator.Please open an issue at  0https://github.com/input-output-hk/io-sim/issues.io-simSelect events according to the predicate function. It throws an error if the simulation ends with .io-simLike 9, but it returns even if the simulation trace ends with .io-simSelect all the traced values matching the expected type. It relies on the sim's dynamic trace facility.For convenience, it throws exceptions for abnormal sim termination.io-simLike / but it also captures time of the trace event.io-simLike 8 but it returns even if the simulation trace ends with .io-simLike / but it also captures time of the trace event.io-simGet a trace of :.For convenience, it throws exceptions for abnormal sim termination.io-simLike . but it also captures time of the trace event.io-simLike 8 but it returns even if the simulation trace ends with .io-simLike . but it also captures time of the trace event.io-sim Print all : to the console.For convenience, it throws exceptions for abnormal sim termination.io-sim+The most general select function. It is a total function.io-sim Select dynamic events. It is a total function.io-simSelect say events. It is a total function.io-simt is a pure monad.io-simFor quick experiments and tests it is often appropriate and convenient to simply throw failures as exceptions.io-simLike  but fail when the main thread terminates if there are other threads still running or blocked. If one is trying to follow a strict thread clean-up policy then this helps testing for that.io-sim)Fold through the trace and return either  or a simulation result, i.e. the return value of the main thread.io-simTurn ^# into a list of timestamped events.io-sim!Pretty print a timestamped event.io-simSee  below.io-simExecute a simulation, discover & revert races. Note that this will execute the simulation multiple times with different schedules, and thus it's much more costly than a simple  (also the simulation environments has much more state to track and hence it is slower).7On property failure it will show the failing schedule ( ) which can be passed to < to reproduce the failure without discovering the schedule.io-simTrace ^ to stderr.An internal function.io-simRun a simulation using a given schedule. This is useful to reproduce failing cases without exploring the races.io-simLike  monadicSThttps://hackage.haskell.org/package/QuickCheck-2.14.3/docs/Test-QuickCheck-Monadic.html#v:monadicST.Note: it calls  in non-strict mode, e.g. leaked threads do not cause failures.io-simA more general version of , which:.allows to run in monad stacks build on top of t;gives more control how to attach debugging information to failed tests.?Note, to use this combinator your monad needs to be defined as: 9newtype M s a = M s { runM :: ReaderT State (IOSim s) a }It's important that `M s` is a monad. For such a monad one you'll need provide a natural transformation: - -- the state could also be created as an t6 computation. nat :: forall s a. State -> M s a -> t0 s a nat state m = runStateT (runM m) state io-simLike .io-simif True the simulation will fail if there are any threads which didn't terminated when the main thread terminated.io-simsimulation traceio-sim"modify default exploration optionsio-sima simulation to runio-sima callback which receives the previous trace (e.g. before reverting a race condition) and current traceio-simrace exploration optionsio-sima schedule control to reproduceio-sima callback which receives the simulation trace. The trace will not contain any race eventsio-simlimit on the computation time allowed per scheduling step, for catching infinite loops etc.io-sima schedule to replaynote: must be either   or  .io-sima simulation to runio-simAllows to trace ^8 in counterexamples. The simplest use case is to pass: either (\e -> counterexample (show e) False) id . traceResult Falseas  does.io-simnatural transformation from m to IOSim` sts -./01234^ |{wvyxzu_b`acdefghijklm9:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]5678}~pqnorts -./01234^ |{wvyxzu|{wvyxzu_b`acdefghijklm9:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]5678}~pqnor   ! " # $ % & '()*+,-./0123456789:;<=>?@ABCDEFG H I I J K L M N O O P Q R S T U V W X Y Z [ \ ] ^ _ ` a b c d e f g h i j k l m n o p q r s t u v w x y z { | } ~ ~                      w           1                                            0   -                                                                                                                     %io-sim-1.5.0.0-6O88j7yzWF4BJzSA7Z77CxControl.Monad.IOSimData.List.Traceio-simControl.Monad.IOSim.CommonTypesControl.Monad.Class.MonadTest exploreRaces&Control.Monad.IOSimPOR.QuickCheckUtilsControl.Monad.IOSimPOR.TimeoutControl.Monad.IOSimPOR.Types updateRacesData.Deque.StrictControl.Monad.IOSim.STMControl.Monad.IOSim.TypestraceM Debug.Trace traceEvents traceResultselectTraceEventsselectTraceEventsDynamicprintTraceEventsSay!Control.Monad.IOSim.InternalTypesControl.Monad.IOSimPOR.Internal!Control.Monad.Class.MonadTimer.SI registerDelay threadDelayControl.Monad.IOSim.Internal runSimTrace ThreadLabel IOSimThreadId RacyThreadIdThreadId ScheduleModscheduleModTargetscheduleModControlscheduleModInsertionScheduleControlControlDefault ControlAwait ControlFollowTraceConsNilheadtailfilterlengthtoListfromListppTracetake takeWhiledrop dropWhile $fShow1Trace $fOrd1Trace $fEq1Trace$fMonadFixTrace$fMonadPlusTrace$fAlternativeTrace$fMonadFailTrace $fMonadTrace$fApplicativeTrace $fMonoidTrace$fSemigroupTrace$fBitraversableTrace$fBifoldableTrace$fBifunctorTrace $fShowTrace $fEqTrace $fOrdTrace$fFunctorTraceExplorationSpecExplorationOptionsexplorationScheduleBoundexplorationBranchingexplorationStepTimelimitexplorationReplayexplorationDebugLevelLabelled l_labelledl_label SimEventTypeEventSayEventLog EventMask EventThrow EventThrowToEventThrowToBlockedEventThrowToWakeupEventThrowToUnmaskedEventThreadForkedEventThreadFinishedEventThreadUnhandledEventTxCommittedEventTxAbortedEventTxBlocked EventTxWakeupEventUnblockedEventThreadDelayEventThreadDelayFiredEventTimeoutCreatedEventTimeoutFiredEventRegisterDelayCreatedEventRegisterDelayFiredEventTimerCreatedEventTimerCancelledEventTimerFiredEventThreadStatus EventSimStartEventThreadSleepEventThreadWakeEventDescheduleEventFollowControlEventAwaitControlEventPerformActionEventReschedule EventEffect EventRacesSimTrace SimResult MainReturn MainExceptionDeadlockLoop InternalErrorSimEvent SimPOREvent SimRacesFoundseTime seThreadId seThreadLabelseTypeseStepEventlogMarker EventlogEventTimeoutSTMSimIOSimTraceInternalError TraceLoop TraceDeadlockTraceMainExceptionTraceMainReturnTraceRacesFound SimPORTracetraceSTMliftSTsetCurrentTime unshareClock newTimeout readTimeout cancelTimeout awaitTimeout ppSimEventppTrace_ppDebugstdExplorationOptionswithScheduleBound withBranchingwithStepTimelimit withReplay runSimTraceSTFailureFailureExceptionFailureDeadlockFailureSloppyShutdownFailureEvaluationFailureInternalselectTraceEvents'selectTraceRaces selectTraceEventsDynamicWithTimeselectTraceEventsDynamic'!selectTraceEventsDynamicWithTime'selectTraceEventsSayselectTraceEventsSayWithTimeselectTraceEventsSay'selectTraceEventsSayWithTime'traceSelectTraceEventstraceSelectTraceEventsDynamictraceSelectTraceEventsSayrunSim runSimOrThrowrunSimStrictShutdownppEventsexploreSimTracecontrolSimTrace monadicIOSim_ monadicIOSim runIOSimGen$fExceptionFailure $fShowFailuretvarId tvarLabel tvarCurrenttvarUndo tvarBlocked tvarVClock tvarTraceStepIdppIOSimThreadIdppStepId childThreadId setRacyThreadTVarId TimeoutIdClockId VectorClockgetVectorClock ppVectorClock unTimeoutId TVarLabelTVarSomeTVar DescheduleYield InterruptableBlocked TerminatedSleep ThreadStatus ThreadRunning ThreadBlocked ThreadDone BlockedReason BlockedOnSTMBlockedOnDelayBlockedOnThrowToppListTestableNoCatchpropertyNoCatch conjoinParconjoinNoCatchconjoinSpeculate.&&| againNoCatchtimeout unsafeTimeout $fShowTimeoutStepInfo stepInfoStep stepInfoRacesstepInfoControlstepInfoConcurrentstepInfoNonDepEffect racingEffects effectReads effectWrites effectForks effectThrows effectWakeup readEffects writeEffects forkEffect throwToEffect wakeupEffectsonlyReadEffectppEffectisDefaultScheduleStep stepThreadIdstepStep stepEffect stepVClockRaces activeRaces completeRacesnoRacesDequesnocuncons MVarDefault)io-classes-1.5.0.0-IHV97s85XfT4an33opVqHV%Control.Monad.Class.MonadSTM.InternalSTMputMVarDefaulttakeMVarDefault MVarStateMVarreadMVarDefaultMVarFull MVarEmptyTBQueueDefaultTBQueue TQueueDefaultTQueuelabelTQueueDefaulttraceTQueueDefaultnewTQueueDefaultwriteTQueueDefaultreadTQueueDefaulttryReadTQueueDefaultisEmptyTQueueDefaultpeekTQueueDefaulttryPeekTQueueDefaultflushTQueueDefaultunGetTQueueDefaultlabelTBQueueDefaulttraceTBQueueDefaultnewTBQueueDefaultreadTBQueueDefaulttryReadTBQueueDefaultpeekTBQueueDefaulttryPeekTBQueueDefaultwriteTBQueueDefaultisEmptyTBQueueDefaultisFullTBQueueDefaultlengthTBQueueDefaultflushTBQueueDefaultunGetTBQueueDefaultnewEmptyMVarDefaultnewMVarDefaulttryPutMVarDefaulttryTakeMVarDefaulttryReadMVarDefaultisEmptyMVarDefaultbase GHC.MaybeNothingAtomicallyFrame atomically BranchFrame BranchStmAOrElse OrElseStmA CatchStmACatchStmControl.Monad.Class.MonadThrowcatchNoOpStmA StmTxResultStmTxCommitted traceTVar StmTxBlocked StmTxAbortedControl.Monad.Class.MonadFork labelThread labelTVarControl.Monad.Class.MonadSaysaythrowToretryControl.Monad.Class.MonadTimer System.IOputStrLnghc-prim GHC.TypesIONegativeTimeoutData.Typeable.InternalTypeableGHC.STSTControl.Monad.Class.MonadSTMonadSTtrace$fPrimMonadIOSim$fMonadTraceSTMIOSim$fNoThunksIOSimunIOSimrunIOSimSimACatch NewTimeout CancelTimeoutFixReturnOutputSayLiftST GetMonoTime GetWallTime SetWallTime UnshareClock StartTimeoutUnregisterTimeout RegisterDelay ThreadDelayThrowEvaluateFork GetThreadId LabelThread AtomicallyThrowTo SetMaskState GetMaskStateYieldSim ExploreRacesunSTMrunSTMStmA OutputStm ReturnStmThrowStmNewTVar LabelTVarReadTVar WriteTVarRetrySayStm TraceTVar LiftSTStmFixStmStmStackTimeoutExceptionppSimEventType ppSimResultThrower ThrowSelf ThrowOther(si-timers-1.5.0.0-8jW26pMhmLMBFiZPzJbavH Control.Monad.Class.MonadTime.SITimeaddTimediffTime execReadTVarunsafeUnregisterTimeout ThreadControl ControlStack MainFrame ForkFrame MaskFrame CatchFrame TimeoutFrame DelayFrameIsLocked NotLockedLockedSimStatethreadscurTimetimersclocksnextVidnextTmidcontrolperStepTimeLimitTimerCompletionInfoTimerTimerRegisterDelayTimerThreadDelay TimerTimeouttimeSinceEpoch time-1.12.2(Data.Time.Clock.Internal.NominalDiffTimeNominalDiffTime insertThreadrunqueuescheduleforkTimeoutInterruptThreadsunwindControlStackControl.Monad.ST.Lazy.ImpexecAtomically'execAtomically traceTVarSTthreadsUnblockedByWrites racingSteps stepThreadhappensBeforeStepunblockThreadsTruecontrolSimTraceST traceDebugLogreplaySimTrace