lambdaya-bus-0.0.0.2: Fpga bus core and serialization for RedPitaya

CopyrightLuka Rahne
LicenseLGPL-3 (see the file LICENSE)
MaintainerLuka Rahne <luka.rahne@gmail.com>
Safe HaskellNone
LanguageHaskell2010

System.RedPitaya.Bus.ClientBind

Description

 

Documentation

writeCore :: forall rp a a1 a2 a3 a4. (BusBuildC a a1 a2 a3 a4, KnownNat a4, FpgaSetGet rp) => Page -> Offset -> (SNat a2, SNat a3) -> a -> rp () Source #

readCore :: forall rp a a1 a2 a3 a4. (BusBuildC a a1 a2 a3 a4, FpgaSetGet rp) => Page -> Offset -> (SNat a2, SNat a3) -> rp a Source #

callCore :: (BusBuildC a a1 a2 a3 a4, BusBuildC b b1 b2 b3 b4, KnownNat a4, FpgaSetGet rp) => (SNat a2, SNat a3, SNat b2, SNat b3) -> Page -> Offset -> Page -> Offset -> a -> rp b Source #