llvm-extra-0.2.0.2: Utility functions for the llvm interface

LLVM.Extra.Extension.X86

Description

Some special operations on X86 processors. If you want to use them in algorithm you will always have to prepare an alternative implementation in terms of plain LLVM instructions. You will then run them with run and this driver function then selects the most advanced of both implementations. Functions that are written this way can be found in LLVM.Extra.Vector. Availability of extensions is checked with the CPUID instruction. However this does only work if you compile code for the host machine, that is cross compilation will fail! For cross compilation we would need access to the SubTarget detection of LLVM that is only available in the C++ interface in version 2.6.

Synopsis

Documentation

maxss :: T (VFloat -> VFloat -> CodeGenFunction r VFloat)Source

minss :: T (VFloat -> VFloat -> CodeGenFunction r VFloat)Source

maxps :: T (VFloat -> VFloat -> CodeGenFunction r VFloat)Source

minps :: T (VFloat -> VFloat -> CodeGenFunction r VFloat)Source

maxsd :: T (VDouble -> VDouble -> CodeGenFunction r VDouble)Source

minsd :: T (VDouble -> VDouble -> CodeGenFunction r VDouble)Source

maxpd :: T (VDouble -> VDouble -> CodeGenFunction r VDouble)Source

minpd :: T (VDouble -> VDouble -> CodeGenFunction r VDouble)Source

cmpss :: T (FPPredicate -> VFloat -> VFloat -> CodeGenFunction r (Value (Vector D4 Int32)))Source

cmpps :: T (FPPredicate -> VFloat -> VFloat -> CodeGenFunction r (Value (Vector D4 Int32)))Source

cmpsd :: T (FPPredicate -> VDouble -> VDouble -> CodeGenFunction r (Value (Vector D2 Int64)))Source

cmppd :: T (FPPredicate -> VDouble -> VDouble -> CodeGenFunction r (Value (Vector D2 Int64)))Source

cvtpd2dq :: T (VDouble -> CodeGenFunction r (Value (Vector D4 Int32)))Source

the upper two integers are set to zero, there is no instruction that converts to Int64

ldmxcsr :: T (Value (Ptr Word32) -> CodeGenFunction r ())Source

MXCSR is not really supported by LLVM-2.6. LLVM does not know about the dependency of all floating point operations on this status register.

haddps :: T (VFloat -> VFloat -> CodeGenFunction r VFloat)Source

haddpd :: T (VDouble -> VDouble -> CodeGenFunction r VDouble)Source

dpps :: T (VFloat -> VFloat -> Value Word32 -> CodeGenFunction r VFloat)Source

dppd :: T (VDouble -> VDouble -> Value Word32 -> CodeGenFunction r VDouble)Source

roundss :: T (VFloat -> Value Word32 -> CodeGenFunction r VFloat)Source

roundps :: T (VFloat -> Value Word32 -> CodeGenFunction r VFloat)Source

roundsd :: T (VDouble -> Value Word32 -> CodeGenFunction r VDouble)Source

roundpd :: T (VDouble -> Value Word32 -> CodeGenFunction r VDouble)Source

absss :: T (VFloat -> CodeGenFunction r VFloat)Source

abssd :: T (VDouble -> CodeGenFunction r VDouble)Source

absps :: T (VFloat -> CodeGenFunction r VFloat)Source

abspd :: T (VDouble -> CodeGenFunction r VDouble)Source