| Copyright | (c) 2019 Yann Herklotz Grave |
|---|---|
| License | GPL-3 |
| Maintainer | yann [at] yannherklotz [dot] com |
| Stability | experimental |
| Portability | POSIX |
| Safe Haskell | None |
| Language | Haskell2010 |
Verismith.Circuit.Gen
Description
Generate verilog from circuit.
Documentation
generateAST :: Circuit -> Verilog Source #