module Lava.ComputeNetlist (
computeNetlist,
preLayoutNetlist
)
where
import Control.Monad.State
import Lava.ApplyLayout
import Lava.Netlist
computeNetlist :: String -> XilinxArchitecture -> Out () -> Netlist
computeNetlist name architecture circuit
= if nesting /= 0 then
error ("Final layout nesting is not zero (" ++ show nesting ++ ")")
else
if length l > 1 then
error ("Currently Lava only supports one top level layout group but has computed " ++ show (length l))
else
applyLayout netlist
where
netlist = preLayoutNetlist name architecture circuit
nesting = layoutNesting netlist
l = layout netlist
preLayoutNetlist :: String -> XilinxArchitecture -> Out () -> Netlist
preLayoutNetlist name architecture circuit
= execState circuit (Netlist name [] [] 2 0 [] 0 undefined architecture [])