harpy-0.4.2: Runtime code generation for x86 machine code

Portabilityportable (but generated code non-portable)




Functions for generating x86 machine code instructions. The functions make use of the code generation monad in module Harpy.CodeGenMonad for emitting binary code into a code buffer.

This module is very low-level, since there are different functions for different addressing modes. A more convenient interface is provided in module Harpy.X86Assembler, which uses the operand types to determine the correct addressing modes for all supported instructions.

Note: this file does not (yet) provide the complete x86 instruction set, not even all user-mode instructions. For some operations, some addressing modes are missing as well.

Copyright notice:

The information in this file is based on the header file x86-codegen.h from the mono distribution, which has the following copyright information:

  * x86-codegen.h: Macros for generating x86 code
  * Authors:
  *   Paolo Molaro (lupus@ximian.com)
  *   Intel Corporation (ORP Project)
  *   Sergey Chaban (serge@wildwestsoftware.com)
  *   Dietmar Maurer (dietmar@ximian.com)
  *   Patrik Torstensson
  * Copyright (C)  2000 Intel Corporation.  All rights reserved.
  * Copyright (C)  2001, 2002 Ximian, Inc.




Machine characteristics

Sizes of various machine data types in bytes.

x86_max_instruction_bytes :: IntSource

Maximal length of an x86 instruction in bytes.

Register numbers

x86 general-purpose register numbers

x86_nobasereg :: Word8Source

Used to encode the fact that no base register is used in an instruction.

Register masks and predicates

Bitvector masks for general-purpose registers

x86_callee_regs :: IntSource

Bitvector mask for callee-saved registers

x86_caller_regs :: IntSource

Bitvector mask for caller-saved registers

x86_byte_regs :: IntSource

Bitvector mask for byte-adressable registers

ALU operations

Opcodes for ALU instructions

Shift operations

Opcodes for shift instructions

FP operations

Opcodes for floating-point instructions

FP conditions and control codes

FP status word codes

x86_fp_c1 :: Word32Source

FP status

FP control word codes

x86_fpcw_prec_double :: Word32Source

Values for precision control

x86_fpcw_round_down :: Word32Source

Values for rounding control

Condition codes

Integer conditions codes

Instruction prefix codes


Utility functions

x86_is_scratch :: Int -> BoolSource

Returns true when the given register is caller-saved.

x86_is_callee :: Int -> BoolSource

Returns true when the given register is caller-saved.

Code emission

These functions are used to emit parts of instructions, such as constants or operand descriptions.

x86_imm_emit16 :: Word16 -> CodeGen e s ()Source

Emit a 16-bit constant to the instruction stream.

x86_imm_emit8 :: Word8 -> CodeGen e s ()Source

Emit a 8-bit constant to the instruction stream.

x86_imm_emit32 :: Word32 -> CodeGen e s ()Source

Emit a 32-bit constant to the instruction stream.

x86_membase_emit :: Word8 -> Word8 -> Word32 -> CodeGen e s ()Source

Emit a mem+base address encoding

Call instructions

Function prologue and epilogue

Jump and branch

Stack operations

Data movement



String operations

Bitwise shift

Conditional move

Conditional set

Address calculation


Floating point

data FIntSize Source



SSE instructions

newtype XMMReg Source


XMMReg Word8 


Eq XMMReg 
Ord XMMReg 
Show XMMReg 
XMMLocation XMMReg 
Ucomiss XMMReg XMMReg 
Ucomiss XMMReg Ind 
Ucomiss XMMReg Addr 
Ucomisd XMMReg XMMReg 
Ucomisd XMMReg Ind 
Ucomisd XMMReg Addr 
Comiss XMMReg XMMReg 
Comiss XMMReg Ind 
Comiss XMMReg Addr 
Comisd XMMReg XMMReg 
Comisd XMMReg Ind 
Comisd XMMReg Addr 
Movlps XMMReg XMMReg 
Movlps XMMReg Ind 
Movlps XMMReg Addr 
Movlps Ind XMMReg 
Movlps Addr XMMReg 
Movups XMMReg XMMReg 
Movups XMMReg Ind 
Movups XMMReg Addr 
Movups Ind XMMReg 
Movups Addr XMMReg 
Movsd XMMReg XMMReg 
Movsd XMMReg Ind 
Movsd XMMReg Addr 
Movsd Ind XMMReg 
Movsd Addr XMMReg 
Movss XMMReg XMMReg 
Movss XMMReg Ind 
Movss XMMReg Addr 
Movss Ind XMMReg 
Movss Addr XMMReg 
Maxps XMMReg XMMReg 
Maxps XMMReg Ind 
Maxps XMMReg Addr 
Maxpd XMMReg XMMReg 
Maxpd XMMReg Ind 
Maxpd XMMReg Addr 
Maxss XMMReg XMMReg 
Maxss XMMReg Ind 
Maxss XMMReg Addr 
Maxsd XMMReg XMMReg 
Maxsd XMMReg Ind 
Maxsd XMMReg Addr 
Minps XMMReg XMMReg 
Minps XMMReg Ind 
Minps XMMReg Addr 
Minpd XMMReg XMMReg 
Minpd XMMReg Ind 
Minpd XMMReg Addr 
Minss XMMReg XMMReg 
Minss XMMReg Ind 
Minss XMMReg Addr 
Minsd XMMReg XMMReg 
Minsd XMMReg Ind 
Minsd XMMReg Addr 
Divps XMMReg XMMReg 
Divps XMMReg Ind 
Divps XMMReg Addr 
Divpd XMMReg XMMReg 
Divpd XMMReg Ind 
Divpd XMMReg Addr 
Divss XMMReg XMMReg 
Divss XMMReg Ind 
Divss XMMReg Addr 
Divsd XMMReg XMMReg 
Divsd XMMReg Ind 
Divsd XMMReg Addr 
Mulps XMMReg XMMReg 
Mulps XMMReg Ind 
Mulps XMMReg Addr 
Mulpd XMMReg XMMReg 
Mulpd XMMReg Ind 
Mulpd XMMReg Addr 
Mulss XMMReg XMMReg 
Mulss XMMReg Ind 
Mulss XMMReg Addr 
Mulsd XMMReg XMMReg 
Mulsd XMMReg Ind 
Mulsd XMMReg Addr 
Subps XMMReg XMMReg 
Subps XMMReg Ind 
Subps XMMReg Addr 
Subpd XMMReg XMMReg 
Subpd XMMReg Ind 
Subpd XMMReg Addr 
Subss XMMReg XMMReg 
Subss XMMReg Ind 
Subss XMMReg Addr 
Subsd XMMReg XMMReg 
Subsd XMMReg Ind 
Subsd XMMReg Addr 
Addps XMMReg XMMReg 
Addps XMMReg Ind 
Addps XMMReg Addr 
Addpd XMMReg XMMReg 
Addpd XMMReg Ind 
Addpd XMMReg Addr 
Addss XMMReg XMMReg 
Addss XMMReg Ind 
Addss XMMReg Addr 
Addsd XMMReg XMMReg 
Addsd XMMReg Ind 
Addsd XMMReg Addr 
Sqrtps XMMReg XMMReg 
Sqrtps XMMReg Ind 
Sqrtps XMMReg Addr 
Sqrtpd XMMReg XMMReg 
Sqrtpd XMMReg Ind 
Sqrtpd XMMReg Addr 
Sqrtss XMMReg XMMReg 
Sqrtss XMMReg Ind 
Sqrtss XMMReg Addr 
Sqrtsd XMMReg XMMReg 
Sqrtsd XMMReg Ind 
Sqrtsd XMMReg Addr 
Ucomiss XMMReg (Disp, Reg32) 
Ucomisd XMMReg (Disp, Reg32) 
Comiss XMMReg (Disp, Reg32) 
Comisd XMMReg (Disp, Reg32) 
Movlps XMMReg (Disp, Reg32) 
Movups XMMReg (Disp, Reg32) 
Movsd XMMReg (Disp, Reg32) 
Movss XMMReg (Disp, Reg32) 
Maxps XMMReg (Disp, Reg32) 
Maxpd XMMReg (Disp, Reg32) 
Maxss XMMReg (Disp, Reg32) 
Maxsd XMMReg (Disp, Reg32) 
Minps XMMReg (Disp, Reg32) 
Minpd XMMReg (Disp, Reg32) 
Minss XMMReg (Disp, Reg32) 
Minsd XMMReg (Disp, Reg32) 
Divps XMMReg (Disp, Reg32) 
Divpd XMMReg (Disp, Reg32) 
Divss XMMReg (Disp, Reg32) 
Divsd XMMReg (Disp, Reg32) 
Mulps XMMReg (Disp, Reg32) 
Mulpd XMMReg (Disp, Reg32) 
Mulss XMMReg (Disp, Reg32) 
Mulsd XMMReg (Disp, Reg32) 
Subps XMMReg (Disp, Reg32) 
Subpd XMMReg (Disp, Reg32) 
Subss XMMReg (Disp, Reg32) 
Subsd XMMReg (Disp, Reg32) 
Addps XMMReg (Disp, Reg32) 
Addpd XMMReg (Disp, Reg32) 
Addss XMMReg (Disp, Reg32) 
Addsd XMMReg (Disp, Reg32) 
Sqrtps XMMReg (Disp, Reg32) 
Sqrtpd XMMReg (Disp, Reg32) 
Sqrtss XMMReg (Disp, Reg32) 
Sqrtsd XMMReg (Disp, Reg32) 
Movlps (Disp, Reg32) XMMReg 
Movups (Disp, Reg32) XMMReg 
Movsd (Disp, Reg32) XMMReg 
Movss (Disp, Reg32) XMMReg 

newtype Mem Source


Mem Word32 

x86_movlps_to_reg :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

xmm must not be a register

x86_movlps_from_reg :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

xmm must not be a register

x86_movlpd_to_reg :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

xmm must not be a register

x86_movlpd_from_reg :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

xmm must not be a register

x86_haddps :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

x86_haddpd :: XMMLocation xmm => Word8 -> xmm -> CodeGen e s ()Source

x86_shufps :: XMMLocation xmm => Word8 -> xmm -> Word8 -> CodeGen e s ()Source

x86_shufpd :: XMMLocation xmm => Word8 -> xmm -> Word8 -> CodeGen e s ()Source

Prefetch instructions


x86_padding :: Num t => t -> CodeGen e s ()Source

Other utilities

negateCC :: Int -> IntSource

Invert a condition code.