| Copyright | (c) David Cox 2021 |
|---|---|
| License | BSD-3-Clause |
| Maintainer | standardsemiconductor@gmail.com |
| Safe Haskell | None |
| Language | Haskell2010 |
Ice40.GB
Description
Global buffer IP primitive from Lattice Ice Technology Library. Required for a user's internally generated FPGA signal that is heavily loaded and requires global buffering; for example, a user's logic-generated clock.