{-# LANGUAGE RecordWildCards, RankNTypes #-}
module RetroClash.Delayed
    ( delayVGA

    , delayedRom
    , delayedRam
    , delayedBlockRam1
    , sharedDelayed
    , sharedDelayedRW

    , delayedRegister
    , liftD
    , liftD2
    , matchDelay
    )
    where

import Clash.Prelude
import qualified Clash.Signal.Delayed.Bundle as D
import RetroClash.VGA
import RetroClash.Utils (enable, guardA, muxA, (.<|))
import Data.Maybe
import Control.Monad (mplus)

delayVGA
    :: (KnownNat d, KnownNat r, KnownNat g, KnownNat b)
    => (HiddenClockResetEnable dom)
    => VGASync dom
    -> DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
    -> VGAOut dom r g b
delayVGA :: forall (d :: Nat) (r :: Nat) (g :: Nat) (b :: Nat) (dom :: Domain).
(KnownNat d, KnownNat r, KnownNat g, KnownNat b,
 HiddenClockResetEnable dom) =>
VGASync dom
-> DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
-> VGAOut dom r g b
delayVGA VGASync{"DE" ::: Signal dom Bool
"VSYNC" ::: Signal dom Bit
vgaHSync :: "VSYNC" ::: Signal dom Bit
vgaVSync :: "VSYNC" ::: Signal dom Bit
vgaDE :: "DE" ::: Signal dom Bool
$sel:vgaHSync:VGASync :: forall (dom :: Domain). VGASync dom -> "HSYNC" ::: Signal dom Bit
$sel:vgaVSync:VGASync :: forall (dom :: Domain). VGASync dom -> "HSYNC" ::: Signal dom Bit
$sel:vgaDE:VGASync :: forall (dom :: Domain). VGASync dom -> "DE" ::: Signal dom Bool
..} DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
rgb = VGASync dom
-> Signal dom (Unsigned r, Unsigned g, Unsigned b)
-> VGAOut dom r g b
forall (dom :: Domain) (r :: Nat) (g :: Nat) (b :: Nat).
(HiddenClockResetEnable dom, KnownNat r, KnownNat g, KnownNat b) =>
VGASync dom
-> Signal dom (Unsigned r, Unsigned g, Unsigned b)
-> VGAOut dom r g b
vgaOut VGASync dom
vgaSync' (DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
-> Signal dom (Unsigned r, Unsigned g, Unsigned b)
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
rgb)
  where
    vgaSync' :: VGASync dom
vgaSync' = VGASync
        { $sel:vgaHSync:VGASync :: "VSYNC" ::: Signal dom Bit
vgaHSync = DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
-> Bit
-> ("VSYNC" ::: Signal dom Bit)
-> "VSYNC" ::: Signal dom Bit
forall (d :: Nat) a (dom :: Domain) any.
(KnownNat d, NFDataX a, HiddenClockResetEnable dom) =>
DSignal dom d any -> a -> Signal dom a -> Signal dom a
matchDelay DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
rgb Bit
forall a. HasCallStack => a
undefined "VSYNC" ::: Signal dom Bit
vgaHSync
        , $sel:vgaVSync:VGASync :: "VSYNC" ::: Signal dom Bit
vgaVSync = DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
-> Bit
-> ("VSYNC" ::: Signal dom Bit)
-> "VSYNC" ::: Signal dom Bit
forall (d :: Nat) a (dom :: Domain) any.
(KnownNat d, NFDataX a, HiddenClockResetEnable dom) =>
DSignal dom d any -> a -> Signal dom a -> Signal dom a
matchDelay DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
rgb Bit
forall a. HasCallStack => a
undefined "VSYNC" ::: Signal dom Bit
vgaVSync
        , $sel:vgaDE:VGASync :: "DE" ::: Signal dom Bool
vgaDE = DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
-> Bool -> ("DE" ::: Signal dom Bool) -> "DE" ::: Signal dom Bool
forall (d :: Nat) a (dom :: Domain) any.
(KnownNat d, NFDataX a, HiddenClockResetEnable dom) =>
DSignal dom d any -> a -> Signal dom a -> Signal dom a
matchDelay DSignal dom d (Unsigned r, Unsigned g, Unsigned b)
rgb Bool
False "DE" ::: Signal dom Bool
vgaDE
        }

matchDelay
    :: (KnownNat d, NFDataX a, HiddenClockResetEnable dom)
    => DSignal dom d any
    -> a
    -> Signal dom a
    -> Signal dom a
matchDelay :: forall (d :: Nat) a (dom :: Domain) any.
(KnownNat d, NFDataX a, HiddenClockResetEnable dom) =>
DSignal dom d any -> a -> Signal dom a -> Signal dom a
matchDelay DSignal dom d any
ref a
x0 = DSignal dom d a -> Signal dom a
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal (DSignal dom d a -> Signal dom a)
-> (Signal dom a -> DSignal dom d a)
-> Signal dom a
-> Signal dom a
forall b c a. (b -> c) -> (a -> b) -> a -> c
. (DSignal dom d any
ref DSignal dom d any -> DSignal dom d a -> DSignal dom d a
forall a b. DSignal dom d a -> DSignal dom d b -> DSignal dom d b
forall (f :: Type -> Type) a b. Applicative f => f a -> f b -> f b
*>) (DSignal dom d a -> DSignal dom d a)
-> (Signal dom a -> DSignal dom d a)
-> Signal dom a
-> DSignal dom d a
forall b c a. (b -> c) -> (a -> b) -> a -> c
. a -> DSignal dom 0 a -> DSignal dom (0 + d) a
forall (d :: Nat) (n :: Nat) a (dom :: Domain).
(HiddenClock dom, HiddenEnable dom, NFDataX a, KnownNat d) =>
a -> DSignal dom n a -> DSignal dom (n + d) a
delayI a
x0 (DSignal dom 0 a -> DSignal dom d a)
-> (Signal dom a -> DSignal dom 0 a)
-> Signal dom a
-> DSignal dom d a
forall b c a. (b -> c) -> (a -> b) -> a -> c
. Signal dom a -> DSignal dom 0 a
forall (dom :: Domain) a. Signal dom a -> DSignal dom 0 a
fromSignal

delayedRam
    :: (HiddenClockResetEnable dom)
    => (forall dom'. (HiddenClockResetEnable dom') => Signal dom' addr -> Signal dom' wr -> Signal dom' a)
    -> DSignal dom d addr
    -> DSignal dom d wr
    -> DSignal dom (d + 1) a
delayedRam :: forall (dom :: Domain) addr wr a (d :: Nat).
HiddenClockResetEnable dom =>
(forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' addr -> Signal dom' wr -> Signal dom' a)
-> DSignal dom d addr -> DSignal dom d wr -> DSignal dom (d + 1) a
delayedRam forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' addr -> Signal dom' wr -> Signal dom' a
syncRam DSignal dom d addr
addr DSignal dom d wr
write = Signal dom a -> DSignal dom (d + 1) a
forall (dom :: Domain) a (n :: Nat).
Signal dom a -> DSignal dom n a
unsafeFromSignal (Signal dom a -> DSignal dom (d + 1) a)
-> Signal dom a -> DSignal dom (d + 1) a
forall a b. (a -> b) -> a -> b
$ Signal dom addr -> Signal dom wr -> Signal dom a
forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' addr -> Signal dom' wr -> Signal dom' a
syncRam (DSignal dom d addr -> Signal dom addr
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d addr
addr) (DSignal dom d wr -> Signal dom wr
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d wr
write)

delayedRom
    :: (HiddenClockResetEnable dom)
    => (forall dom'. (HiddenClockResetEnable dom') => Signal dom' addr -> Signal dom' a)
    -> DSignal dom d addr
    -> DSignal dom (d + 1) a
delayedRom :: forall (dom :: Domain) addr a (d :: Nat).
HiddenClockResetEnable dom =>
(forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' addr -> Signal dom' a)
-> DSignal dom d addr -> DSignal dom (d + 1) a
delayedRom forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' addr -> Signal dom' a
syncRom DSignal dom d addr
addr = Signal dom a -> DSignal dom (d + 1) a
forall (dom :: Domain) a (n :: Nat).
Signal dom a -> DSignal dom n a
unsafeFromSignal (Signal dom a -> DSignal dom (d + 1) a)
-> Signal dom a -> DSignal dom (d + 1) a
forall a b. (a -> b) -> a -> b
$ Signal dom addr -> Signal dom a
forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' addr -> Signal dom' a
syncRom (DSignal dom d addr -> Signal dom addr
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d addr
addr)

delayedBlockRam1
    :: (1 <= n, Enum addr, NFDataX addr, NFDataX a, HiddenClockResetEnable dom)
    => ResetStrategy r
    -> SNat n
    -> a
    -> DSignal dom d addr
    -> DSignal dom d (Maybe (addr, a))
    -> DSignal dom (d + 1) a
delayedBlockRam1 :: forall (n :: Nat) addr a (dom :: Domain) (r :: Bool) (d :: Nat).
(1 <= n, Enum addr, NFDataX addr, NFDataX a,
 HiddenClockResetEnable dom) =>
ResetStrategy r
-> SNat n
-> a
-> DSignal dom d addr
-> DSignal dom d (Maybe (addr, a))
-> DSignal dom (d + 1) a
delayedBlockRam1 ResetStrategy r
resetStrat SNat n
size a
content = (forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' addr -> Signal dom' (Maybe (addr, a)) -> Signal dom' a)
-> DSignal dom d addr
-> DSignal dom d (Maybe (addr, a))
-> DSignal dom (d + 1) a
forall (dom :: Domain) addr wr a (d :: Nat).
HiddenClockResetEnable dom =>
(forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' addr -> Signal dom' wr -> Signal dom' a)
-> DSignal dom d addr -> DSignal dom d wr -> DSignal dom (d + 1) a
delayedRam (ResetStrategy r
-> SNat n
-> a
-> Signal dom' addr
-> Signal dom' (Maybe (addr, a))
-> Signal dom' a
forall (n :: Nat) (dom :: Domain) a (r :: Bool) addr.
(HasCallStack, HiddenClockResetEnable dom, NFDataX a, Enum addr,
 NFDataX addr, 1 <= n) =>
ResetStrategy r
-> SNat n
-> a
-> Signal dom addr
-> Signal dom (Maybe (addr, a))
-> Signal dom a
blockRam1 ResetStrategy r
resetStrat SNat n
size a
content)

delayedRegister
    :: (NFDataX a, HiddenClockResetEnable dom)
    => a
    -> (DSignal dom d a -> DSignal dom d a)
    -> DSignal dom (d + 1) a
delayedRegister :: forall a (dom :: Domain) (d :: Nat).
(NFDataX a, HiddenClockResetEnable dom) =>
a -> (DSignal dom d a -> DSignal dom d a) -> DSignal dom (d + 1) a
delayedRegister a
initial DSignal dom d a -> DSignal dom d a
feedback = DSignal dom (d + 1) a
r
  where
    r :: DSignal dom (d + 1) a
r = Signal dom a -> DSignal dom (d + 1) a
forall (dom :: Domain) a (n :: Nat).
Signal dom a -> DSignal dom n a
unsafeFromSignal (Signal dom a -> DSignal dom (d + 1) a)
-> Signal dom a -> DSignal dom (d + 1) a
forall a b. (a -> b) -> a -> b
$ a -> Signal dom a -> Signal dom a
forall (dom :: Domain) a.
(HiddenClockResetEnable dom, NFDataX a) =>
a -> Signal dom a -> Signal dom a
register a
initial (Signal dom a -> Signal dom a) -> Signal dom a -> Signal dom a
forall a b. (a -> b) -> a -> b
$ DSignal dom d a -> Signal dom a
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d a
new
    old :: DSignal dom d a
old = SNat 1 -> DSignal dom (d + 1) a -> DSignal dom d a
forall (d :: Nat) (dom :: Domain) (n :: Nat) a.
SNat d -> DSignal dom (n + d) a -> DSignal dom n a
antiDelay (forall (n :: Nat). KnownNat n => SNat n
SNat @1) DSignal dom (d + 1) a
r
    new :: DSignal dom d a
new = DSignal dom d a -> DSignal dom d a
feedback DSignal dom d a
old

liftD
    :: (HiddenClockResetEnable dom)
    => (forall dom'. (HiddenClockResetEnable dom') => Signal dom' a -> Signal dom' b)
    -> DSignal dom d a -> DSignal dom d b
liftD :: forall (dom :: Domain) a b (d :: Nat).
HiddenClockResetEnable dom =>
(forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' a -> Signal dom' b)
-> DSignal dom d a -> DSignal dom d b
liftD forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' a -> Signal dom' b
f = Signal dom b -> DSignal dom d b
forall (dom :: Domain) a (n :: Nat).
Signal dom a -> DSignal dom n a
unsafeFromSignal (Signal dom b -> DSignal dom d b)
-> (DSignal dom d a -> Signal dom b)
-> DSignal dom d a
-> DSignal dom d b
forall b c a. (b -> c) -> (a -> b) -> a -> c
. Signal dom a -> Signal dom b
forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' a -> Signal dom' b
f (Signal dom a -> Signal dom b)
-> (DSignal dom d a -> Signal dom a)
-> DSignal dom d a
-> Signal dom b
forall b c a. (b -> c) -> (a -> b) -> a -> c
. DSignal dom d a -> Signal dom a
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal

liftD2
    :: (HiddenClockResetEnable dom)
    => (forall dom'. (HiddenClockResetEnable dom') => Signal dom' a -> Signal dom' b -> Signal dom' c)
    -> DSignal dom d a -> DSignal dom d b -> DSignal dom d c
liftD2 :: forall (dom :: Domain) a b c (d :: Nat).
HiddenClockResetEnable dom =>
(forall (dom' :: Domain).
 HiddenClockResetEnable dom' =>
 Signal dom' a -> Signal dom' b -> Signal dom' c)
-> DSignal dom d a -> DSignal dom d b -> DSignal dom d c
liftD2 forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' a -> Signal dom' b -> Signal dom' c
f DSignal dom d a
x DSignal dom d b
y = Signal dom c -> DSignal dom d c
forall (dom :: Domain) a (n :: Nat).
Signal dom a -> DSignal dom n a
unsafeFromSignal (Signal dom c -> DSignal dom d c)
-> Signal dom c -> DSignal dom d c
forall a b. (a -> b) -> a -> b
$ Signal dom a -> Signal dom b -> Signal dom c
forall (dom' :: Domain).
HiddenClockResetEnable dom' =>
Signal dom' a -> Signal dom' b -> Signal dom' c
f (DSignal dom d a -> Signal dom a
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d a
x) (DSignal dom d b -> Signal dom b
forall (dom :: Domain) (delay :: Nat) a.
DSignal dom delay a -> Signal dom a
toSignal DSignal dom d b
y)

sharedDelayed
    :: (KnownNat k, KnownNat n, HiddenClockResetEnable dom)
    => (DSignal dom d (Maybe addr) -> DSignal dom (d + k) a)
    -> Vec (n + 1) (DSignal dom d (Maybe addr))
    -> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
sharedDelayed :: forall (k :: Nat) (n :: Nat) (dom :: Domain) (d :: Nat) addr a.
(KnownNat k, KnownNat n, HiddenClockResetEnable dom) =>
(DSignal dom d (Maybe addr) -> DSignal dom (d + k) a)
-> Vec (n + 1) (DSignal dom d (Maybe addr))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
sharedDelayed DSignal dom d (Maybe addr) -> DSignal dom (d + k) a
mem Vec (n + 1) (DSignal dom d (Maybe addr))
reqs = Vec (n + 1) (DSignal dom (d + k) (Maybe a))
reads
  where
    addrs :: Vec (n + 1) (DSignal dom d (Maybe addr))
addrs = (DSignal dom d Bool, Vec (n + 1) (DSignal dom d (Maybe addr)))
-> Vec (n + 1) (DSignal dom d (Maybe addr))
forall a b. (a, b) -> b
snd ((DSignal dom d Bool, Vec (n + 1) (DSignal dom d (Maybe addr)))
 -> Vec (n + 1) (DSignal dom d (Maybe addr)))
-> (DSignal dom d Bool, Vec (n + 1) (DSignal dom d (Maybe addr)))
-> Vec (n + 1) (DSignal dom d (Maybe addr))
forall a b. (a -> b) -> a -> b
$ (DSignal dom d Bool
 -> DSignal dom d (Maybe addr)
 -> (DSignal dom d Bool, DSignal dom d (Maybe addr)))
-> DSignal dom d Bool
-> Vec (n + 1) (DSignal dom d (Maybe addr))
-> (DSignal dom d Bool, Vec (n + 1) (DSignal dom d (Maybe addr)))
forall acc x y (n :: Nat).
(acc -> x -> (acc, y)) -> acc -> Vec n x -> (acc, Vec n y)
mapAccumL DSignal dom d Bool
-> DSignal dom d (Maybe addr)
-> (DSignal dom d Bool, DSignal dom d (Maybe addr))
forall {f :: Type -> Type} {a}.
Applicative f =>
f Bool -> f (Maybe a) -> (f Bool, f (Maybe a))
step (Bool -> DSignal dom d Bool
forall a. a -> DSignal dom d a
forall (f :: Type -> Type) a. Applicative f => a -> f a
pure Bool
True) Vec (n + 1) (DSignal dom d (Maybe addr))
reqs
      where
        step :: f Bool -> f (Maybe a) -> (f Bool, f (Maybe a))
step f Bool
en f (Maybe a)
addr = (f Bool
en f Bool -> f Bool -> f Bool
forall (f :: Type -> Type).
Applicative f =>
f Bool -> f Bool -> f Bool
.&&. Maybe a -> Bool
forall a. Maybe a -> Bool
isNothing (Maybe a -> Bool) -> f (Maybe a) -> f Bool
forall (f :: Type -> Type) a b. Functor f => (a -> b) -> f a -> f b
<$> f (Maybe a)
addr, f Bool -> f (Maybe a) -> f (Maybe a)
forall (f :: Type -> Type) (m :: Type -> Type) a.
(Applicative f, Alternative m) =>
f Bool -> f (m a) -> f (m a)
guardA f Bool
en f (Maybe a)
addr)

    addr :: DSignal dom d (Maybe addr)
addr = Vec (n + 1) (DSignal dom d (Maybe addr))
-> DSignal dom d (Maybe addr)
forall (t :: Type -> Type) (m :: Type -> Type) (f :: Type -> Type)
       a.
(Foldable t, Alternative m, Applicative f) =>
t (f (m a)) -> f (m a)
muxA Vec (n + 1) (DSignal dom d (Maybe addr))
addrs

    read :: DSignal dom (d + k) a
read = DSignal dom d (Maybe addr) -> DSignal dom (d + k) a
mem DSignal dom d (Maybe addr)
addr
    reads :: Vec (n + 1) (DSignal dom (d + k) (Maybe a))
reads = (DSignal dom d (Maybe addr) -> DSignal dom (d + k) (Maybe a))
-> Vec (n + 1) (DSignal dom d (Maybe addr))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
forall a b (n :: Nat). (a -> b) -> Vec n a -> Vec n b
map (\DSignal dom d (Maybe addr)
addr -> DSignal dom (d + k) Bool
-> DSignal dom (d + k) a -> DSignal dom (d + k) (Maybe a)
forall (f :: Type -> Type) a.
Applicative f =>
f Bool -> f a -> f (Maybe a)
enable (Bool -> DSignal dom d Bool -> DSignal dom (d + k) Bool
forall (d :: Nat) (n :: Nat) a (dom :: Domain).
(HiddenClock dom, HiddenEnable dom, NFDataX a, KnownNat d) =>
a -> DSignal dom n a -> DSignal dom (n + d) a
delayI Bool
False (DSignal dom d Bool -> DSignal dom (d + k) Bool)
-> DSignal dom d Bool -> DSignal dom (d + k) Bool
forall a b. (a -> b) -> a -> b
$ Maybe addr -> Bool
forall a. Maybe a -> Bool
isJust (Maybe addr -> Bool)
-> DSignal dom d (Maybe addr) -> DSignal dom d Bool
forall (f :: Type -> Type) a b. Functor f => (a -> b) -> f a -> f b
<$> DSignal dom d (Maybe addr)
addr) DSignal dom (d + k) a
read) Vec (n + 1) (DSignal dom d (Maybe addr))
addrs

sharedDelayedRW
    :: (KnownNat k, KnownNat n, HiddenClockResetEnable dom)
    => (DSignal dom d addr -> DSignal dom d (Maybe wr) -> DSignal dom (d + k) a)
    -> Vec (n + 1) (DSignal dom d (Maybe (addr, Maybe wr)))
    -> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
sharedDelayedRW :: forall (k :: Nat) (n :: Nat) (dom :: Domain) (d :: Nat) addr wr a.
(KnownNat k, KnownNat n, HiddenClockResetEnable dom) =>
(DSignal dom d addr
 -> DSignal dom d (Maybe wr) -> DSignal dom (d + k) a)
-> Vec (n + 1) (DSignal dom d (Maybe (addr, Maybe wr)))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
sharedDelayedRW DSignal dom d addr
-> DSignal dom d (Maybe wr) -> DSignal dom (d + k) a
ram = (DSignal dom d (Maybe (addr, Maybe wr)) -> DSignal dom (d + k) a)
-> Vec (n + 1) (DSignal dom d (Maybe (addr, Maybe wr)))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
forall (k :: Nat) (n :: Nat) (dom :: Domain) (d :: Nat) addr a.
(KnownNat k, KnownNat n, HiddenClockResetEnable dom) =>
(DSignal dom d (Maybe addr) -> DSignal dom (d + k) a)
-> Vec (n + 1) (DSignal dom d (Maybe addr))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
sharedDelayed ((DSignal dom d (Maybe (addr, Maybe wr)) -> DSignal dom (d + k) a)
 -> Vec (n + 1) (DSignal dom d (Maybe (addr, Maybe wr)))
 -> Vec (n + 1) (DSignal dom (d + k) (Maybe a)))
-> (DSignal dom d (Maybe (addr, Maybe wr))
    -> DSignal dom (d + k) a)
-> Vec (n + 1) (DSignal dom d (Maybe (addr, Maybe wr)))
-> Vec (n + 1) (DSignal dom (d + k) (Maybe a))
forall a b. (a -> b) -> a -> b
$ (DSignal dom d addr
 -> DSignal dom d (Maybe wr) -> DSignal dom (d + k) a)
-> (DSignal dom d addr, DSignal dom d (Maybe wr))
-> DSignal dom (d + k) a
forall a b c. (a -> b -> c) -> (a, b) -> c
uncurry DSignal dom d addr
-> DSignal dom d (Maybe wr) -> DSignal dom (d + k) a
ram ((DSignal dom d addr, DSignal dom d (Maybe wr))
 -> DSignal dom (d + k) a)
-> (DSignal dom d (Maybe (addr, Maybe wr))
    -> (DSignal dom d addr, DSignal dom d (Maybe wr)))
-> DSignal dom d (Maybe (addr, Maybe wr))
-> DSignal dom (d + k) a
forall b c a. (b -> c) -> (a -> b) -> a -> c
. DSignal dom d (addr, Maybe wr)
-> (DSignal dom d addr, DSignal dom d (Maybe wr))
DSignal dom d (addr, Maybe wr) -> Unbundled dom d (addr, Maybe wr)
forall a (dom :: Domain) (d :: Nat).
Bundle a =>
DSignal dom d a -> Unbundled dom d a
forall (dom :: Domain) (d :: Nat).
DSignal dom d (addr, Maybe wr) -> Unbundled dom d (addr, Maybe wr)
D.unbundle (DSignal dom d (addr, Maybe wr)
 -> (DSignal dom d addr, DSignal dom d (Maybe wr)))
-> (DSignal dom d (Maybe (addr, Maybe wr))
    -> DSignal dom d (addr, Maybe wr))
-> DSignal dom d (Maybe (addr, Maybe wr))
-> (DSignal dom d addr, DSignal dom d (Maybe wr))
forall b c a. (b -> c) -> (a -> b) -> a -> c
. (DSignal dom d (Maybe (addr, Maybe wr))
-> (addr, Maybe wr) -> DSignal dom d (addr, Maybe wr)
forall (f :: Type -> Type) a.
Applicative f =>
f (Maybe a) -> a -> f a
.<| (addr
forall a. HasCallStack => a
undefined, Maybe wr
forall a. Maybe a
Nothing))