The si-clock package

[ Tags: bsd3, ham, hardware, i2c, library, radio, sdr, si5351 ] [ Propose Tags ]

An experimental interface to the Silicon Labs I2C-programmable any-frequency CMOS clock generator and VCXO. (tested with the Si5351 cip).


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Properties

Versions 0.1.0, 0.1.1, 0.1.3, 0.1.3.1
Dependencies base (<4.11), bytestring, hsI2C (==0.1.3.*), time, transformers [details]
License BSD3
Author Marc.Fontaine@gmx.de
Maintainer Marc.Fontaine@gmx.de
Category HAM, Radio, Si5351, SDR, I2C, Hardware
Source repository head: git clone git://github.com/MarcFontaine/si-clock
Uploaded Fri Nov 3 12:54:26 UTC 2017 by MarcFontaine
Distributions NixOS:0.1.3.1
Downloads 181 total (49 in the last 30 days)
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Status Docs available [build log]
Last success reported on 2017-11-03 [all 1 reports]
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Readme for si-clock-0.1.3.1

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An interface to the Silicon Labs Si5351 clock chip

Si5351 Board

The Si5351 is Silicon Labs I2C-programmable any-frequency CMOS clock generator and VCXO. It can generate any frequency from ca 8kHz to 160MHz. The Si5351 uses a programmable rational clock divider.

Why yet an other SI5351 library ?

First of all it is hackable in Haskell. And second, almost all of the other open source Si5351 libraries use a fixed denominator for the clock divider. In other words, 20 of the 58 bits, that set the clock divider, are hard-coded in library. As the IC always uses a combination of two rational divider stages, a total of 2*20 bits = 40 bits, that the carefully designed hardware provides, are lost by the software design. That means "40 bits less resolution and more jitter".

Instead of a fixed denominator, this library uses continued fractions to compute the (theoretically best) numerator-denominator pair for the clock divider. (TO DO investigate if this makes any difference in practice.)

Examples

The library contains examples for:

  • Frequency synthesis
  • Hopping frequencies
  • CW generation (Morse code)
  • Transmitting JT65
  • RTTY / FSK

Haddock documentation