module Asm.Aarch64.Opt ( opt ) where

import           Asm.Aarch64

opt :: (Eq reg, Eq freg) => [AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt :: forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt (Str ()
_ reg
r0 (R reg
ar0):Str ()
_ reg
r1 (RP reg
ar1 Word16
8):[AArch64 reg freg ()]
asms) | reg
ar0 reg -> reg -> Bool
forall a. Eq a => a -> a -> Bool
== reg
ar1 = () -> reg -> reg -> Addr reg -> AArch64 reg freg ()
forall reg freg a.
a -> reg -> reg -> Addr reg -> AArch64 reg freg a
Stp () reg
r0 reg
r1 (reg -> Addr reg
forall reg. reg -> Addr reg
R reg
ar0)AArch64 reg freg ()
-> [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall a. a -> [a] -> [a]
:[AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt [AArch64 reg freg ()]
asms
opt ((MovRC ()
_ reg
r Word16
0):[AArch64 reg freg ()]
asms) = [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt (() -> reg -> AArch64 reg freg ()
forall reg freg a. a -> reg -> AArch64 reg freg a
ZeroR () reg
rAArch64 reg freg ()
-> [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall a. a -> [a] -> [a]
:[AArch64 reg freg ()]
asms)
opt ((ZeroR ()
_ reg
r0):(MovK ()
_ reg
r1 Word16
u Int
s):[AArch64 reg freg ()]
asms) | reg
r0 reg -> reg -> Bool
forall a. Eq a => a -> a -> Bool
== reg
r1 = [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt (() -> reg -> Word16 -> Int -> AArch64 reg freg ()
forall reg freg a. a -> reg -> Word16 -> Int -> AArch64 reg freg a
MovZ () reg
r1 Word16
u Int
sAArch64 reg freg ()
-> [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall a. a -> [a] -> [a]
:[AArch64 reg freg ()]
asms)
opt ((MovRR ()
_ reg
r0 reg
r1):[AArch64 reg freg ()]
asms) | reg
r0 reg -> reg -> Bool
forall a. Eq a => a -> a -> Bool
== reg
r1 = [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt [AArch64 reg freg ()]
asms
opt ((FMovXX ()
_ freg
r0 freg
r1):[AArch64 reg freg ()]
asms) | freg
r0 freg -> freg -> Bool
forall a. Eq a => a -> a -> Bool
== freg
r1 = [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt [AArch64 reg freg ()]
asms
opt (AArch64 reg freg ()
asm:[AArch64 reg freg ()]
asms) = AArch64 reg freg ()
asm AArch64 reg freg ()
-> [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall a. a -> [a] -> [a]
: [AArch64 reg freg ()] -> [AArch64 reg freg ()]
forall reg freg.
(Eq reg, Eq freg) =>
[AArch64 reg freg ()] -> [AArch64 reg freg ()]
opt [AArch64 reg freg ()]
asms
opt [] = []