crucible-0.7.1: Crucible is a library for language-agnostic symbolic simulation
Copyright(c) Galois Inc 2014
LicenseBSD3
MaintainerJoe Hendrix <jhendrix@galois.com>
Stabilityprovisional
Safe HaskellSafe-Inferred
LanguageHaskell2010

Lang.Crucible.Simulator.RegMap

Description

Register maps hold the values of registers at simulation/run time.

Synopsis

Documentation

data RegEntry sym tp Source #

The value of a register.

Constructors

RegEntry 

Fields

muxRegEntry :: IsSymInterface sym => sym -> IntrinsicTypes sym -> MuxFn (Pred sym) (RegEntry sym tp) Source #

Mux two register entries.

newtype RegMap sym (ctx :: Ctx CrucibleType) Source #

A set of registers in an execution frame.

Constructors

RegMap 

Fields

regMapSize :: RegMap sym ctx -> Size ctx Source #

emptyRegMap :: RegMap sym EmptyCtx Source #

Create a new set of registers.

reg :: forall n sym ctx tp. Idx n ctx tp => RegMap sym ctx -> RegValue sym tp Source #

regVal :: RegMap sym ctx -> Reg ctx tp -> RegValue sym tp Source #

regVal' :: RegMap sym ctx -> Reg ctx tp -> RegEntry sym tp Source #

assignReg :: TypeRepr tp -> RegValue sym tp -> RegMap sym ctx -> RegMap sym (ctx ::> tp) Source #

assignReg' :: RegEntry sym tp -> RegMap sym ctx -> RegMap sym (ctx ::> tp) Source #

appendRegs :: RegMap sym ctx -> RegMap sym ctx' -> RegMap sym (ctx <+> ctx') Source #

takeRegs :: Size ctx -> Size ctx' -> RegMap sym (ctx <+> ctx') -> RegMap sym ctx Source #

unconsReg :: RegMap sym (ctx ::> tp) -> (RegMap sym ctx, RegEntry sym tp) Source #

muxRegForType :: forall sym tp. IsSymInterface sym => sym -> IntrinsicTypes sym -> TypeRepr tp -> ValMuxFn sym tp Source #

eqReference :: IsSymInterface sym => sym -> RegValue sym (ReferenceType tp) -> RegValue sym (ReferenceType tp) -> IO (Pred sym) Source #

pushBranchForType :: forall sym tp. IsSymInterface sym => sym -> IntrinsicTypes sym -> TypeRepr tp -> RegValue sym tp -> IO (RegValue sym tp) Source #

abortBranchForType :: forall sym tp. IsSymInterface sym => sym -> IntrinsicTypes sym -> TypeRepr tp -> RegValue sym tp -> IO (RegValue sym tp) Source #

pushBranchRegs :: forall sym ctx. IsSymInterface sym => sym -> IntrinsicTypes sym -> RegMap sym ctx -> IO (RegMap sym ctx) Source #

abortBranchRegs :: forall sym ctx. IsSymInterface sym => sym -> IntrinsicTypes sym -> RegMap sym ctx -> IO (RegMap sym ctx) Source #

pushBranchRegEntry :: IsSymInterface sym => sym -> IntrinsicTypes sym -> RegEntry sym tp -> IO (RegEntry sym tp) Source #

abortBranchRegEntry :: IsSymInterface sym => sym -> IntrinsicTypes sym -> RegEntry sym tp -> IO (RegEntry sym tp) Source #

mergeRegs :: IsSymInterface sym => sym -> IntrinsicTypes sym -> MuxFn (Pred sym) (RegMap sym ctx) Source #

asSymExpr Source #

Arguments

:: RegEntry sym tp

RegEntry to examine

-> (forall bt. tp ~ BaseToType bt => SymExpr sym bt -> a)

calculate final value when the register is a SymExpr

-> a

final value to use if the register entry is not a SymExpr

-> a