harpy-0.4.1: Runtime code generation for x86 machine code

Portabilityportable (but generated code non-portable)
Stabilityprovisional
Maintainer{magr,klee}@cs.tu-berlin.de

Harpy.X86CodeGen

Contents

Description

Functions for generating x86 machine code instructions. The functions make use of the code generation monad in module Harpy.CodeGenMonad for emitting binary code into a code buffer.

This module is very low-level, since there are different functions for different addressing modes. A more convenient interface is provided in module Harpy.X86Assembler, which uses the operand types to determine the correct addressing modes for all supported instructions.

Note: this file does not (yet) provide the complete x86 instruction set, not even all user-mode instructions. For some operations, some addressing modes are missing as well.

Copyright notice:

The information in this file is based on the header file x86-codegen.h from the mono distribution, which has the following copyright information:

 
  * x86-codegen.h: Macros for generating x86 code
  *
  * Authors:
  *   Paolo Molaro (lupus@ximian.com)
  *   Intel Corporation (ORP Project)
  *   Sergey Chaban (serge@wildwestsoftware.com)
  *   Dietmar Maurer (dietmar@ximian.com)
  *   Patrik Torstensson
  * 
  * Copyright (C)  2000 Intel Corporation.  All rights reserved.
  * Copyright (C)  2001, 2002 Ximian, Inc.
  *

Synopsis

Types

Constants

Machine characteristics

Sizes of various machine data types in bytes.

x86_max_instruction_bytes :: IntSource

Maximal length of an x86 instruction in bytes.

Register numbers

x86 general-purpose register numbers

x86_nobasereg :: Word8Source

Used to encode the fact that no base register is used in an instruction.

Register masks and predicates

Bitvector masks for general-purpose registers

x86_callee_regs :: IntSource

Bitvector mask for callee-saved registers

x86_caller_regs :: IntSource

Bitvector mask for caller-saved registers

x86_byte_regs :: IntSource

Bitvector mask for byte-adressable registers

ALU operations

Opcodes for ALU instructions

Shift operations

Opcodes for shift instructions

FP operations

Opcodes for floating-point instructions

FP conditions and control codes

FP status word codes

x86_fp_c1 :: Word32Source

FP status

FP control word codes

x86_fpcw_prec_double :: Word32Source

Values for precision control

x86_fpcw_round_down :: Word32Source

Values for rounding control

Condition codes

Integer conditions codes

Instruction prefix codes

Functions

Utility functions

x86_is_scratch :: Int -> BoolSource

Returns true when the given register is caller-saved.

x86_is_callee :: Int -> BoolSource

Returns true when the given register is caller-saved.

Code emission

These functions are used to emit parts of instructions, such as constants or operand descriptions.

x86_imm_emit16 :: Word16 -> CodeGen e s ()Source

Emit a 16-bit constant to the instruction stream.

x86_imm_emit8 :: Word8 -> CodeGen e s ()Source

Emit a 8-bit constant to the instruction stream.

x86_imm_emit32 :: Word32 -> CodeGen e s ()Source

Emit a 32-bit constant to the instruction stream.

x86_membase_emit :: Word8 -> Word8 -> Word32 -> CodeGen e s ()Source

Emit a mem+base address encoding

Call instructions

Function prologue and epilogue

Jump and branch

Stack operations

Data movement

Arithmetic

Exchange

String operations

Bitwise shift

Conditional move

Conditional set

Address calculation

Conversion

Floating point

SSE instructions

Prefetch instructions

Miscellaneous

x86_padding :: Num t => t -> CodeGen e s ()Source

Other utilities

negateCC :: Int -> IntSource

Invert a condition code.