Copyright	(c) David Cox 2021-2024
License	BSD 3-Clause
Maintainer	standardsemiconductor@gmail.com
Safe Haskell	Safe-Inferred
Language	Haskell2010

Ice40.IO

Description

IO hard IP primitive from Lattice Ice Technology Library

Synopsis

ioPrim :: BitVector 6 -> Bit -> Bit -> String -> Signal domIn Bit -> Signal domEn Bit -> Clock domIn -> Clock domOut -> Signal domOut Bit -> Signal domOut Bit -> Signal domOut Bit -> (Signal domPin Bit, Signal domIn Bit, Signal domIn Bit)
data PinInput
- = PinInput
- | PinInputLatch
- | PinInputRegistered
- | PinInputRegisteredLatch
- | PinInputDDR
fromPinInput :: PinInput -> BitVector 2
data PinOutput
fromPinOutput :: PinOutput -> BitVector 4
data IOStandard
- = SBLVCMOS
- | SBLVDSINPUT
fromIOStandard :: IOStandard -> String
io :: PinInput -> PinOutput -> Bit -> Bit -> IOStandard -> Signal domIn Bit -> Signal domEn Bit -> Clock domIn -> Clock domOut -> Signal domOut Bit -> Signal domOut Bit -> Signal domOut Bit -> (Signal domPin Bit, Signal domIn Bit, Signal domIn Bit)

Documentation

ioPrim Source #

Arguments

:: BitVector 6	pinType
-> Bit	pullup
-> Bit	negTrigger
-> String	ioStandard
-> Signal domIn Bit	latchInputValue
-> Signal domEn Bit	clockEnable
-> Clock domIn	inputClk
-> Clock domOut	outputClk
-> Signal domOut Bit	outputEnable
-> Signal domOut Bit	dOut0
-> Signal domOut Bit	dOut1
-> (Signal domPin Bit, Signal domIn Bit, Signal domIn Bit)	(packagePin, dIn0, dIn1)

IO primitive, see io for wrapper

data PinInput Source #

Input pin configuration parameter

Constructors

PinInput	Simple Input pin dIn0
PinInputLatch	Disables Internal data changes on the physical input pin by latching the value
PinInputRegistered	Input data is registered in input cell
PinInputRegisteredLatch	Disables internal data changes on the physical input pin by latching the value on the input register
PinInputDDR	Input DDR data is clocked out on rising and falling clock edges. Use the dIn0 and dIn1 pins for DDR operation

Instances

Instances details

Generic PinInput Source #
Instance details Defined in Ice40.IO Associated Types type Rep PinInput :: Type -> Type # Methods from :: PinInput -> Rep PinInput x # to :: Rep PinInput x -> PinInput #
Read PinInput Source #
Instance details Defined in Ice40.IO Methods readsPrec :: Int -> ReadS PinInput # readList :: ReadS [PinInput] # readPrec :: ReadPrec PinInput # readListPrec :: ReadPrec [PinInput] #
Show PinInput Source #
Instance details Defined in Ice40.IO Methods showsPrec :: Int -> PinInput -> ShowS # show :: PinInput -> String # showList :: [PinInput] -> ShowS #
NFDataX PinInput Source #
Instance details Defined in Ice40.IO Methods deepErrorX :: String -> PinInput # hasUndefined :: PinInput -> Bool # ensureSpine :: PinInput -> PinInput # rnfX :: PinInput -> () #
Eq PinInput Source #
Instance details Defined in Ice40.IO Methods (==) :: PinInput -> PinInput -> Bool # (/=) :: PinInput -> PinInput -> Bool #
type Rep PinInput Source #
Instance details Defined in Ice40.IO type Rep PinInput = D1 ('MetaData "PinInput" "Ice40.IO" "ice40-prim-0.3.1.4-4dGIJ5fNeax6MkePMpZUl3" 'False) ((C1 ('MetaCons "PinInput" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinInputLatch" 'PrefixI 'False) (U1 :: Type -> Type)) :+: (C1 ('MetaCons "PinInputRegistered" 'PrefixI 'False) (U1 :: Type -> Type) :+: (C1 ('MetaCons "PinInputRegisteredLatch" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinInputDDR" 'PrefixI 'False) (U1 :: Type -> Type))))

fromPinInput :: PinInput -> BitVector 2 Source #

Convert PinInput to underlying BitVector

data PinOutput Source #

Output pin configuration parameter

Constructors

PinNoOutput	Disables the output function
PinOutput	Simple output pin (no enable)
PinOutputTristate	The output pin may be tristated using the enable
PinOutputEnableRegistered	The output pin may be tristated using a registered enable signal
PinOutputRegistered	Output registered (no enable)
PinOutputRegisteredEnable	Output registered with enable (the enable is not registered)
PinOutputRegisteredEnableRegistered	Output registered and enable registered
PinOutputDDR	Output DDR data is clocked out on rising and falling clock edges
PinOutputDDREnable	Output data is clocked out on rising and falling clock edges
PinOutputDDREnableRegistered	Output DDR data with registered enable signal
PinOutputRegisteredInverted	Output registered signal is inverted
PinOutputRegisteredEnableInverted	Output signal is registered and inverted (no enable function)
PinOutputRegisteredEnableRegisteredInverted	Output signal is registered and inverted, the enable/tristate control is registered

Instances

Instances details

Generic PinOutput Source #
Instance details Defined in Ice40.IO Associated Types type Rep PinOutput :: Type -> Type # Methods from :: PinOutput -> Rep PinOutput x # to :: Rep PinOutput x -> PinOutput #
Read PinOutput Source #
Instance details Defined in Ice40.IO Methods readsPrec :: Int -> ReadS PinOutput # readList :: ReadS [PinOutput] # readPrec :: ReadPrec PinOutput # readListPrec :: ReadPrec [PinOutput] #
Show PinOutput Source #
Instance details Defined in Ice40.IO Methods showsPrec :: Int -> PinOutput -> ShowS # show :: PinOutput -> String # showList :: [PinOutput] -> ShowS #
NFDataX PinOutput Source #
Instance details Defined in Ice40.IO Methods deepErrorX :: String -> PinOutput # hasUndefined :: PinOutput -> Bool # ensureSpine :: PinOutput -> PinOutput # rnfX :: PinOutput -> () #
Eq PinOutput Source #
Instance details Defined in Ice40.IO Methods (==) :: PinOutput -> PinOutput -> Bool # (/=) :: PinOutput -> PinOutput -> Bool #
type Rep PinOutput Source #
Instance details Defined in Ice40.IO type Rep PinOutput = D1 ('MetaData "PinOutput" "Ice40.IO" "ice40-prim-0.3.1.4-4dGIJ5fNeax6MkePMpZUl3" 'False) (((C1 ('MetaCons "PinNoOutput" 'PrefixI 'False) (U1 :: Type -> Type) :+: (C1 ('MetaCons "PinOutput" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinOutputTristate" 'PrefixI 'False) (U1 :: Type -> Type))) :+: (C1 ('MetaCons "PinOutputEnableRegistered" 'PrefixI 'False) (U1 :: Type -> Type) :+: (C1 ('MetaCons "PinOutputRegistered" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinOutputRegisteredEnable" 'PrefixI 'False) (U1 :: Type -> Type)))) :+: ((C1 ('MetaCons "PinOutputRegisteredEnableRegistered" 'PrefixI 'False) (U1 :: Type -> Type) :+: (C1 ('MetaCons "PinOutputDDR" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinOutputDDREnable" 'PrefixI 'False) (U1 :: Type -> Type))) :+: ((C1 ('MetaCons "PinOutputDDREnableRegistered" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinOutputRegisteredInverted" 'PrefixI 'False) (U1 :: Type -> Type)) :+: (C1 ('MetaCons "PinOutputRegisteredEnableInverted" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "PinOutputRegisteredEnableRegisteredInverted" 'PrefixI 'False) (U1 :: Type -> Type)))))

fromPinOutput :: PinOutput -> BitVector 4 Source #

Convert PinOutput to underlying BitVector

data IOStandard Source #

Input-Output Standards

Constructors

SBLVCMOS
SBLVDSINPUT

Instances

Instances details

Generic IOStandard Source #
Instance details Defined in Ice40.IO Associated Types type Rep IOStandard :: Type -> Type # Methods from :: IOStandard -> Rep IOStandard x # to :: Rep IOStandard x -> IOStandard #
Read IOStandard Source #
Instance details Defined in Ice40.IO Methods readsPrec :: Int -> ReadS IOStandard # readList :: ReadS [IOStandard] # readPrec :: ReadPrec IOStandard # readListPrec :: ReadPrec [IOStandard] #
Show IOStandard Source #
Instance details Defined in Ice40.IO Methods showsPrec :: Int -> IOStandard -> ShowS # show :: IOStandard -> String # showList :: [IOStandard] -> ShowS #
Eq IOStandard Source #
Instance details Defined in Ice40.IO Methods (==) :: IOStandard -> IOStandard -> Bool # (/=) :: IOStandard -> IOStandard -> Bool #
type Rep IOStandard Source #
Instance details Defined in Ice40.IO type Rep IOStandard = D1 ('MetaData "IOStandard" "Ice40.IO" "ice40-prim-0.3.1.4-4dGIJ5fNeax6MkePMpZUl3" 'False) (C1 ('MetaCons "SBLVCMOS" 'PrefixI 'False) (U1 :: Type -> Type) :+: C1 ('MetaCons "SBLVDSINPUT" 'PrefixI 'False) (U1 :: Type -> Type))

fromIOStandard :: IOStandard -> String Source #

Convert IOStandard to underlying String

io Source #

Arguments

:: PinInput
-> PinOutput
-> Bit	pullUp
-> Bit	negTrigger
-> IOStandard
-> Signal domIn Bit	latchInputValue
-> Signal domEn Bit	clockEnable
-> Clock domIn	inputClk
-> Clock domOut	outputClk
-> Signal domOut Bit	outputEnable
-> Signal domOut Bit	dOut0
-> Signal domOut Bit	dOut1
-> (Signal domPin Bit, Signal domIn Bit, Signal domIn Bit)	(packagePin, dIn0, dIn1)

IO primitive