language-vhdl-0.1.2.0: VHDL AST and pretty printer in Haskell.

Safe HaskellSafe
LanguageHaskell2010

Language.VHDL.Syntax

Contents

Synopsis

1.1 Entiity Declarations

1.1.1 Entity haeder

1.1.1.1 Generics

1.1.1.2 Ports

1.1.2 Entity declarative part

1.1.3 Entity statement part

1.2 Arcitecture bodies

1.2.1 Architecture declarative part

1.2.2 Architecture statement part

1.3 Configuration declarations

1.3.1 Block configuration

1.3.2 Component configuration

2.1 Subprogram declarations

2.1.1 Formal parameters

2.1.1.1 Constant and variable parameters

2.1.1.2 Signal parameter

2.1.1.3 File parameter

2.2 Subprogram bodies

2.3 Subprogram overloading

2.3.1 Operator overloading

2.3.2 Signatures

2.4 Resolution functions

2.5 Package declarations

2.6 Package bodies

2.7 Conformance rules

3.1 Scalar types

3.1.1 Enumeration types

3.1.1.1 Predefined enumeration types

3.1.2 Integer types

3.1.2.1 Predefined integer types

3.1.3 Physical types

3.1.3.1 Predefined physical types

3.1.4 Floating point types

3.1.4.1 Predefined floating point types

3.2 Composite types

3.2.1 Array types

3.2.1.1 Index constraints and discrete ranges

3.2.1.2 Predefined array types

3.2.2 Record types

3.3 Access types

3.3.1 Incomplete type declarations

3.3.2 Allocation and deallocation of objects

3.4 File types

3.4.1 File operations

3.5 Protected types

4.1 Type declarations

4.2 Subtype declarations

4.3 Objects

4.3.1 Object declarations

4.3.1.1 Constant declarations

4.3.1.2 Signal declarations

4.3.1.3 Variable declarations

4.3.1.4 File declarations

4.3.2 Interface declarations

4.3.2.1 Interface lists

4.3.2.2 Association lists

4.3.3 Alias declarations

4.3.3.1 Object aliases

4.3.3.2 Nonobject aliases

4.4 Attribute declarations

4.5 Component declarations

4.6 Group template declarations

4.7 Group declarations

5.1 Attribute specification

5.2 Configuration specification

5.2.1 Binding indication

5.2.1.1 Entity aspect

5.2.1.2 Generic map and port map aspects

5.2.2 Default binding indication

5.3 Disconnection specification

6.1 Names

6.2 Simple names

6.3 Selected names

6.4 Indexed names

6.5 Slice names

6.6 Attribute names

7.1 Rules for expressions

7.2 Operators

7.2.1 Logical operators

7.2.2 Relational operators

7.2.3 Shift operators

7.2.4 Adding operators

7.2.5 Sign operators

7.2.6 Multiplying operators

7.2.7 Miscellaneous operators

7.3 Operands

7.3.1 Literals

7.3.2 Aggregates

7.3.2.1 Record aggregates

7.3.2.2 Array aggregates

7.3.3 Function calls

7.3.4 Qualified expressions

7.3.5 Type conversions

7.3.6 Allocators

7.4 Static expressions

7.4.1 Locally static primaries

7.4.2 Globally static primaries

7.5 Universal expressions

8.1 Wait statement

8.2 Assertion statement

8.3 Report statement

8.4 Signal assignment statement

8.4.1 Updating a projected output waveform

8.5 Variable assignment statement

8.5.1 Array variable assignments

8.6 Procedure call statement

8.7 If statement

8.8 Case statement

8.9 Loop statement

8.10 Next statement

8.11 Exit statement

8.12 Return statement

8.13 Null statement

9.1 Block statement

9.2 Process statement

9.3 Concurrent procedure call statements

9.4 Concurrent assertion statements

9.5 Concurrent signal assignment statements

9.5.1 Conditional signal assignments

9.5.2 Selected signal assignments

9.6 Component instantiation statements

9.6.1 Instantiation of a component

9.6.2 Instantiation of a design entity

9.7 Generate statements

10.1 Declarative region

10.2 Scope of declarations

10.3 Visibility

10.4 Use clauses

10.5 The context of overload resolution

11.1 Design units

11.2 Design libraries

11.3 Context clauses

11.3 Order of analysis

data Base Source

Constructors

Base