| &&. | Language.PowerPC.RTL |
| /=. | Language.PowerPC.RTL |
| <. | Language.PowerPC.RTL |
| <=. | Language.PowerPC.RTL |
| <== | Language.PowerPC.RTL |
| ==. | Language.PowerPC.RTL |
| >. | Language.PowerPC.RTL |
| >=. | Language.PowerPC.RTL |
| AA | Language.PowerPC.RTL |
| Add | Language.PowerPC.RTL |
| And | Language.PowerPC.RTL |
| Assign | Language.PowerPC.RTL |
| assign | Language.PowerPC.RTL |
| BA | Language.PowerPC.RTL |
| BB | Language.PowerPC.RTL |
| BD | Language.PowerPC.RTL |
| BF | Language.PowerPC.RTL |
| BI | Language.PowerPC.RTL |
| Bit | Language.PowerPC.RTL |
| BO | Language.PowerPC.RTL |
| BT | Language.PowerPC.RTL |
| BWAnd | Language.PowerPC.RTL |
| BWNot | Language.PowerPC.RTL |
| BWOr | Language.PowerPC.RTL |
| C | Language.PowerPC.RTL |
| CA | Language.PowerPC.RTL |
| CA' | Language.PowerPC.RTL |
| CIA | Language.PowerPC.RTL |
| clearBits | Language.PowerPC.Utils |
| cmp | Language.PowerPC.RTL |
| Cond | Language.PowerPC.RTL |
| CR | Language.PowerPC.RTL |
| cr | Language.PowerPC.Simulator, Language.PowerPC |
| CR' | Language.PowerPC.RTL |
| CRField | Language.PowerPC.RTL |
| CTR | Language.PowerPC.RTL |
| ctr | Language.PowerPC.Simulator, Language.PowerPC |
| D | Language.PowerPC.RTL |
| Div | Language.PowerPC.RTL |
| E | Language.PowerPC.RTL |
| EA | Language.PowerPC.RTL |
| Eq | Language.PowerPC.RTL |
| EXTS | Language.PowerPC.RTL |
| fetch | Language.PowerPC.Simulator, Language.PowerPC |
| GPR | Language.PowerPC.RTL |
| gprs | Language.PowerPC.Simulator, Language.PowerPC |
| If | Language.PowerPC.RTL |
| if' | Language.PowerPC.RTL |
| L10 | Language.PowerPC.RTL |
| L15 | Language.PowerPC.RTL |
| LI | Language.PowerPC.RTL |
| LK | Language.PowerPC.RTL |
| load | Language.PowerPC.Simulator, Language.PowerPC |
| LR | Language.PowerPC.RTL |
| lr | Language.PowerPC.Simulator, Language.PowerPC |
| Lt | Language.PowerPC.RTL |
| Machine | |
| 1 (Type/Class) | Language.PowerPC.Simulator, Language.PowerPC |
| 2 (Data Constructor) | Language.PowerPC.Simulator, Language.PowerPC |
| MASK | Language.PowerPC.RTL |
| MB5 | Language.PowerPC.RTL |
| MB6 | Language.PowerPC.RTL |
| ME5 | Language.PowerPC.RTL |
| ME6 | Language.PowerPC.RTL |
| MEM | Language.PowerPC.RTL |
| Memory | Language.PowerPC.Simulator, Language.PowerPC |
| MSR | Language.PowerPC.RTL |
| Mul | Language.PowerPC.RTL |
| NIA | Language.PowerPC.RTL |
| Not | Language.PowerPC.RTL |
| Null | Language.PowerPC.RTL |
| OE | Language.PowerPC.RTL |
| opcode | Language.PowerPC.Opcode |
| Or | Language.PowerPC.RTL |
| OV | Language.PowerPC.RTL |
| pc | Language.PowerPC.Simulator, Language.PowerPC |
| RA | Language.PowerPC.RTL |
| RAI | Language.PowerPC.RTL |
| RB | Language.PowerPC.RTL |
| Rc | Language.PowerPC.RTL |
| readMSR | Language.PowerPC.Simulator, Language.PowerPC |
| readSPR | Language.PowerPC.Simulator, Language.PowerPC |
| ROTL32 | Language.PowerPC.RTL |
| ROTL64 | Language.PowerPC.RTL |
| RS | Language.PowerPC.RTL |
| RSI | Language.PowerPC.RTL |
| RT | Language.PowerPC.RTL |
| RTI | Language.PowerPC.RTL |
| RTL | |
| 1 (Type/Class) | Language.PowerPC.RTL |
| 2 (Data Constructor) | Language.PowerPC.RTL |
| rtl | Language.PowerPC.Instructions |
| Seq | Language.PowerPC.RTL |
| setBits | Language.PowerPC.Utils |
| SH5 | Language.PowerPC.RTL |
| SH6 | Language.PowerPC.RTL |
| Shift | Language.PowerPC.RTL |
| SI | Language.PowerPC.RTL |
| simulate | Language.PowerPC.Simulator, Language.PowerPC |
| SPR | Language.PowerPC.RTL |
| Stmt | Language.PowerPC.RTL |
| stmt | Language.PowerPC.RTL |
| store | Language.PowerPC.Simulator, Language.PowerPC |
| Sub | Language.PowerPC.RTL |
| UI | Language.PowerPC.RTL |
| V | Language.PowerPC.RTL |
| While | Language.PowerPC.RTL |
| while | Language.PowerPC.RTL |
| writeMSR | Language.PowerPC.Simulator, Language.PowerPC |
| writeSPR | Language.PowerPC.Simulator, Language.PowerPC |
| XER | Language.PowerPC.RTL |
| xer | Language.PowerPC.Simulator, Language.PowerPC |
| ||. | Language.PowerPC.RTL |