Language.Pck.Cpu

Run the processor

run :: InstImage -> DataImage -> CpuState

run the processor

Example: simple run

 > run [(0, [MOVI R0 20, HALT])] []
 pc : 1
 gr : [20,0,0,0,0,0,0,0]
 fl : [False,False]
 ...

Example: run with initial data

 > run [(0, [MOVI R1 0, LD R0 R1, HALT])] [(0,[100])]
 pc : 2
 gr : [100,0,0,0,0,0,0,0]
 fl : [False,False]
 ...

The instruction set

data Inst

the instruction definition.

You can create instructions as you like :-)

Operand order is Intel, ARM, MIPS, PowerPC,... order. (opcode dst src1 src2)

Constructors

NOP

no operation

HALT

halt (stop the processor)

MOVI GReg Int

GReg <- Int

MOV GReg GReg

GReg <- GReg

MOVPC GReg

GReg <- PC

ADD GReg GReg GReg

GReg <- GReg + GReg

SUB GReg GReg GReg

GReg <- GReg - GReg

CMP GReg GReg

Flag <- compare(GReg, GReg)

ABS GReg GReg

GReg <- abs(GReg)

ASH GReg GReg GReg

GReg <- GReg << GReg // arithmetic shift

MUL GReg GReg GReg

GReg <- GReg * GReg

DIV GReg GReg GReg

GReg <- GReg / GReg

AND GReg GReg GReg

GReg <- GReg & GReg

OR GReg GReg GReg

GReg <- GReg | GReg

NOT GReg GReg

GReg <- ~GReg

XOR GReg GReg GReg

GReg <- GReg ^ GReg

LSH GReg GReg GReg

GReg <- GReg << GReg // logical shift

BRI FCond Int

if (FCond(Flag)) goto (PC + Int) // pc relative addressing

JRI Int

goto (PC + Int) // pc relative addressing

J GReg

goto GReg // absolute addressing

CALL GReg

goto GReg; R0 <- PC // absolute addressing

RET

goto R0

LD GReg GReg

GReg <- memory(GReg)

ST GReg GReg

memory(GReg) <- GReg

UNDEF

undefined

Instances

Eq Inst

Show Inst

NFData Inst

data GReg

the general purpose registers.

You can create registers as you like :-)

Constructors

R0

R1

R2

R3

R4

R5

R6

R7

Instances

Bounded GReg

Enum GReg

Eq GReg

Ord GReg

Show GReg

Ix GReg

data FCond

the Flag conditions

Constructors

FCEQ

equal

FCNE

not equal

FCLT

little than

FCLE

little equal

FCGT

greater than

FCGE

greater equal

Instances

Eq FCond

Show FCond

Instruction and data memory images

type InstImage = [(IAddress, [Inst])]

the instruction memory image

 [(StartAddress, [Instruction1,  Instruction2, ...])]

Example:

 [(0, [MOVI R1 0,  LD R0 R1,  HALT])]

type DataImage = [(DAddress, [DValue])]

the data memory image

 [(StartAddress, [Data1,  Data2, ...])]

Example:

 [(0, [1, 5, 7, 0x20])]

Cpu states (processor internal states)

data CpuState

the cpu state (processor internal state)

This is the result type from run function.

get each values by pcFromCpuState, grFromCpuState, flFromCpuState, imemFromCpuState, dmemFromCpuState, dumpCpuState

Instances

Eq CpuState

Show CpuState

pcFromCpuState :: CpuState -> Int

 > pcFromCpuState $ run [(0,[MOVI R0 7, HALT])] []
 1

grFromCpuState :: CpuState -> [Int]

 > grFromCpuState $ run [(0,[MOVI R0 7, HALT])] []
 [7,0,0,0,0,0,0,0]

flFromCpuState :: CpuState -> [Bool]

 > flFromCpuState $ run [(0,[MOVI R0 7, HALT])] []
 [False,False]

imemFromCpuState :: CpuState -> InstImage

 > imemFromCpuState $ run [(0,[MOVI R0 7, HALT])] []
 [(0,[MOVI R0 7,HALT,UNDEF,UNDEF,...])]

dmemFromCpuState :: CpuState -> DataImage

 > dmemFromCpuState $ run [(0,[MOVI R0 0, MOVI R1 10, ST R0 R1, HALT])] []
 [(0,[10,0,0,0,0,...])]

dumpCpuState :: CpuState -> String

dump Cpu state (without instruction image)

 > putStr $ dumpCpuState $ run [(0,[MOVI R0 7, HALT])] []
 pc : 1
 gr : [7,0,0,0,0,0,0,0]
 fl : [False,False]
 dm : [(0,[7,0,0,0,0,...])]