nestId | Verismith.Verilog.Mutate |
nestSource | Verismith.Verilog.Mutate |
nestUpTo | Verismith.Verilog.Mutate |
newPort | Verismith.Generate |
nextPort | Verismith.Generate |
NonBlockAssign | Verismith.Verilog.AST, Verismith.Verilog, Verismith |
None | Verismith.Reduce |
noPrint | Verismith.Tool.Internal |
num | Verismith |
Number | Verismith.Verilog.AST, Verismith.Verilog, Verismith |