Vulkan.Extensions.VK_AMD_buffer_marker

Name

VK_AMD_buffer_marker - device extension

VK_AMD_buffer_marker

Name String

VK_AMD_buffer_marker

Extension Type

Device extension

Registered Extension Number

180

Revision

1

Extension and Version Dependencies

• Requires Vulkan 1.0

Special Use

• Developer tools

Contact

• Daniel Rakos @drakos-amd%0A<<Here describe the issue or question you have about the VK_AMD_buffer_marker extension> >

Other Extension Metadata

Last Modified Date

2018-01-26

IP Status

No known IP claims.

Contributors

• Matthaeus G. Chajdas, AMD
• Jaakko Konttinen, AMD
• Daniel Rakos, AMD

Description

This extension adds a new operation to execute pipelined writes of small marker values into a Buffer object.

The primary purpose of these markers is to facilitate the development of debugging tools for tracking which pipelined command contributed to device loss.

New Commands

• cmdWriteBufferMarkerAMD

New Enum Constants

• AMD_BUFFER_MARKER_EXTENSION_NAME

• AMD_BUFFER_MARKER_SPEC_VERSION

Examples

None.

Version History

• Revision 1, 2018-01-26 (Jaakko Konttinen)

  • Initial revision

See Also

cmdWriteBufferMarkerAMD

Document Notes

For more information, see the Vulkan Specification

This page is a generated document. Fixes and changes should be made to the generator scripts, not directly.

Documentation

cmdWriteBufferMarkerAMD

Arguments

:: forall io. MonadIO io

=> CommandBuffer

commandBuffer is the command buffer into which the command will be recorded.

-> PipelineStageFlagBits

pipelineStage is a PipelineStageFlagBits value specifying the pipeline stage whose completion triggers the marker write.

-> ("dstBuffer" ::: Buffer)

dstBuffer is the buffer where the marker will be written to.

-> ("dstOffset" ::: DeviceSize)

dstOffset is the byte offset into the buffer where the marker will be written to.

-> ("marker" ::: Word32)

marker is the 32-bit value of the marker.

-> io ()

vkCmdWriteBufferMarkerAMD - Execute a pipelined write of a marker value into a buffer

Description

The command will write the 32-bit marker value into the buffer only after all preceding commands have finished executing up to at least the specified pipeline stage. This includes the completion of other preceding cmdWriteBufferMarkerAMD commands so long as their specified pipeline stages occur either at the same time or earlier than this command’s specified pipelineStage.

While consecutive buffer marker writes with the same pipelineStage parameter are implicitly complete in submission order, memory and execution dependencies between buffer marker writes and other operations must still be explicitly ordered using synchronization commands. The access scope for buffer marker writes falls under the ACCESS_TRANSFER_WRITE_BIT, and the pipeline stages for identifying the synchronization scope must include both pipelineStage and PIPELINE_STAGE_TRANSFER_BIT.

Note

Similar to cmdWriteTimestamp, if an implementation is unable to write a marker at any specific pipeline stage, it may instead do so at any logically later stage.

Note

Implementations may only support a limited number of pipelined marker write operations in flight at a given time, thus excessive number of marker write operations may degrade command execution performance.

Valid Usage

• pipelineStage must be a valid stage for the queue family that was used to create the command pool that commandBuffer was allocated from

• If the geometry shaders feature is not enabled, pipelineStage must not be PIPELINE_STAGE_GEOMETRY_SHADER_BIT
• If the tessellation shaders feature is not enabled, pipelineStage must not be PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT or PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT
• If the conditional rendering feature is not enabled, pipelineStage must not be PIPELINE_STAGE_CONDITIONAL_RENDERING_BIT_EXT
• If the fragment density map feature is not enabled, pipelineStage must not be PIPELINE_STAGE_FRAGMENT_DENSITY_PROCESS_BIT_EXT
• If the transform feedback feature is not enabled, pipelineStage must not be PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
• If the mesh shaders feature is not enabled, pipelineStage must not be PIPELINE_STAGE_MESH_SHADER_BIT_NV or PIPELINE_STAGE_TASK_SHADER_BIT_NV
• If the shading rate image feature is not enabled, pipelineStage must not be PIPELINE_STAGE_SHADING_RATE_IMAGE_BIT_NV
• dstOffset must be less than or equal to the size of dstBuffer minus 4
• dstBuffer must have been created with BUFFER_USAGE_TRANSFER_DST_BIT usage flag
• If dstBuffer is non-sparse then it must be bound completely and contiguously to a single DeviceMemory object
• dstOffset must be a multiple of 4

Valid Usage (Implicit)

• commandBuffer must be a valid CommandBuffer handle

• pipelineStage must be a valid PipelineStageFlagBits value
• dstBuffer must be a valid Buffer handle
• commandBuffer must be in the recording state
• The CommandPool that commandBuffer was allocated from must support transfer, graphics, or compute operations
• Both of commandBuffer, and dstBuffer must have been created, allocated, or retrieved from the same Device

Host Synchronization

• Host access to commandBuffer must be externally synchronized

• Host access to the CommandPool that commandBuffer was allocated from must be externally synchronized

Command Properties

'

Command Buffer Levels	Render Pass Scope	Supported Queue Types
Primary Secondary	Both	Transfer Graphics Compute

See Also

VK_AMD_buffer_marker, Buffer, CommandBuffer, DeviceSize, PipelineStageFlagBits

type AMD_BUFFER_MARKER_SPEC_VERSION = 1

pattern AMD_BUFFER_MARKER_SPEC_VERSION :: forall a. Integral a => a

type AMD_BUFFER_MARKER_EXTENSION_NAME = "VK_AMD_buffer_marker"

pattern AMD_BUFFER_MARKER_EXTENSION_NAME :: forall a. (Eq a, IsString a) => a