The clash-vhdl package

[ Tags: bsd2, hardware, library ] [ Propose Tags ]

CλaSH (pronounced ‘clash’) is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The CλaSH compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of CλaSH:

This package provides:


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Properties

Versions 0.5, 0.5.1, 0.5.2, 0.5.3, 0.5.4, 0.5.5, 0.5.6, 0.5.7, 0.5.7.1, 0.5.8, 0.5.9, 0.5.10, 0.5.11, 0.5.12, 0.6, 0.6.1, 0.6.2, 0.6.3, 0.6.4, 0.6.5, 0.6.6, 0.6.7, 0.6.8, 0.6.9, 0.6.10, 0.6.11, 0.6.12, 0.6.13, 0.6.14, 0.6.15, 0.6.16, 0.7, 0.7.1, 0.7.2 (info)
Change log CHANGELOG.md
Dependencies base (>=4.6.0.1 && <5), clash-lib (==0.7.*), clash-prelude (>=0.1 && <0.12), fgl (>=5.4.2.4 && <5.6), hashable (>=1.2.1.0 && <1.3), lens (>=3.9.2 && <4.16), mtl (>=2.1.2 && <2.3), text (>=0.11.3.1 && <1.3), unordered-containers (>=0.2.3.3 && <0.3), wl-pprint-text (>=1.1.0.0 && <1.2) [details]
License BSD2
Copyright Copyright © 2015-2016, University of Twente, 2017, QBayLogic
Author Christiaan Baaij
Maintainer Christiaan Baaij <christiaan.baaij@gmail.com>
Category Hardware
Home page http://www.clash-lang.org/
Bug tracker http://github.com/clash-lang/clash-compiler/issues
Source repository head: git clone https://github.com/clash-lang/clash-compiler.git
Uploaded Tue Apr 25 08:53:38 UTC 2017 by ChristiaanBaaij
Distributions LTSHaskell:0.7.2, NixOS:0.7.2, Tumbleweed:0.7.2
Downloads 3552 total (84 in the last 30 days)
Rating 0.0 (0 ratings) [clear rating]
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Status Docs not available [build log]
All reported builds failed as of 2017-04-25 [all 3 reports]
Hackage Matrix CI

Modules

  • CLaSH
    • Backend
      • CLaSH.Backend.VHDL

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Maintainer's Corner

For package maintainers and hackage trustees


Readme for clash-vhdl-0.7.2

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clash-vhdl - VHDL backend for the CλaSH compiler

  • See the LICENSE file for license and copyright details

CλaSH - A functional hardware description language

CλaSH (pronounced ‘clash’) is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The CλaSH compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of CλaSH:

  • Strongly typed (like VHDL), yet with a very high degree of type inference, enabling both safe and fast prototying using consise descriptions (like Verilog).

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

Support

For updates and questions join the mailing list clash-language+subscribe@googlegroups.com or read the forum