verismith-0.4.0.0: Random verilog generation and simulator testing.

Copyright(c) 2018-2019 Yann Herklotz
LicenseBSD-3
Maintaineryann [at] yannherklotz [dot] com
Stabilityexperimental
PortabilityPOSIX
Safe HaskellNone
LanguageHaskell2010

Verismith.Verilog.CodeGen

Contents

Description

This module generates the code from the Verilog AST defined in Verismith.Verilog.AST.

Synopsis

Code Generation

newtype GenVerilog a Source #

Constructors

GenVerilog 

Fields

Instances
Eq a => Eq (GenVerilog a) Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

(==) :: GenVerilog a -> GenVerilog a -> Bool #

(/=) :: GenVerilog a -> GenVerilog a -> Bool #

Data a => Data (GenVerilog a) Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

gfoldl :: (forall d b. Data d => c (d -> b) -> d -> c b) -> (forall g. g -> c g) -> GenVerilog a -> c (GenVerilog a) #

gunfold :: (forall b r. Data b => c (b -> r) -> c r) -> (forall r. r -> c r) -> Constr -> c (GenVerilog a) #

toConstr :: GenVerilog a -> Constr #

dataTypeOf :: GenVerilog a -> DataType #

dataCast1 :: Typeable t => (forall d. Data d => c (t d)) -> Maybe (c (GenVerilog a)) #

dataCast2 :: Typeable t => (forall d e. (Data d, Data e) => c (t d e)) -> Maybe (c (GenVerilog a)) #

gmapT :: (forall b. Data b => b -> b) -> GenVerilog a -> GenVerilog a #

gmapQl :: (r -> r' -> r) -> r -> (forall d. Data d => d -> r') -> GenVerilog a -> r #

gmapQr :: (r' -> r -> r) -> r -> (forall d. Data d => d -> r') -> GenVerilog a -> r #

gmapQ :: (forall d. Data d => d -> u) -> GenVerilog a -> [u] #

gmapQi :: Int -> (forall d. Data d => d -> u) -> GenVerilog a -> u #

gmapM :: Monad m => (forall d. Data d => d -> m d) -> GenVerilog a -> m (GenVerilog a) #

gmapMp :: MonadPlus m => (forall d. Data d => d -> m d) -> GenVerilog a -> m (GenVerilog a) #

gmapMo :: MonadPlus m => (forall d. Data d => d -> m d) -> GenVerilog a -> m (GenVerilog a) #

Ord a => Ord (GenVerilog a) Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source a => Show (GenVerilog a) Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Mutate a => Mutate (GenVerilog a) Source # 
Instance details

Defined in Verismith.Verilog.Mutate

Methods

mutExpr :: (Expr -> Expr) -> GenVerilog a -> GenVerilog a Source #

class Source a where Source #

Source class which determines that source code is able to be generated from the data structure using genSource. This will be stored in Text and can then be processed further.

Methods

genSource :: a -> Text Source #

Instances
Source SourceInfo Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source Verilog Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source ModDecl Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source ModItem Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source Statement Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source ContAssign Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source Port Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: Port -> Text Source #

Source PortType Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source PortDir Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source LVal Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: LVal -> Text Source #

Source Task Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: Task -> Text Source #

Source ConstExpr Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source Expr Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: Expr -> Text Source #

Source UnaryOperator Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Source Event Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: Event -> Text Source #

Source Delay Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

Methods

genSource :: Delay -> Text Source #

Source Identifier Source # 
Instance details

Defined in Verismith.Verilog.CodeGen

render :: Source a => a -> IO () Source #

Render the Text to IO. This is equivalent to putStrLn.