kansas-lava: Kansas Lava is a hardware simulator and VHDL generator.

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Kansas Lava is a Domain Specific Language (DSL) for expressing hardware-oriented descriptions of computations, and is hosted inside the language Haskell. Kansas Lava programs are descriptions of specific hardware entities, the connections between them, and other computational abstractions that can compile down to these entities.

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kansas-lava-0.2.4.5.tar.gz [browse] (Cabal source package)
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Versions [RSS]	0.2.4, 0.2.4.2, 0.2.4.3, 0.2.4.4, 0.2.4.5
Dependencies	base (>=4 && <5), bytestring, cmdargs, containers, data-default, data-reify (==0.6), directory, dotgen (>=0.4.1), filepath, netlist (>=0.3.1), netlist-to-vhdl (>=0.3.1), process, random, sized-types (>=0.3.5.2 && <0.4), strict, template-haskell (>=2.11) [details]
License	BSD-3-Clause
Copyright	(c) 2009-2011 The University of Kansas
Author	Andy Gill
Maintainer	Andy Gill <andygill@ku.edu>
Category	Language, Hardware
Home page	http://ittc.ku.edu/csdl/fpg/Tools/KansasLava
Source repo	head: git clone git://github.com/ku-fpg/kansas-lava.git this: git clone git://github.com/ku-fpg/kansas-lava.git -b kansas-lava-0.2.4(tag 0.2.4.3)
Uploaded	by GergoErdi at 2018-04-06T20:39:50Z
Distributions	NixOS:0.2.4.5
Executables	kansas-lava-tbf2vcd, kansas-lava-testreport, kansas-lava-unittest
Downloads	4425 total (15 in the last 30 days)
Rating	(no votes yet) [estimated by Bayesian average]
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Status	Docs available [build log] Last success reported on 2018-04-14 [all 1 reports]

Readme for kansas-lava-0.2.4.5

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Kansas Lava

Kansas Lava is a Haskell library which allows the specification and
simulation of hardware, and hardware level concerns.  Haskell
functions written in Kansas Lava can be interpreted as having the
semantics of a specific circuit, or compiled into VHDL, for
compilation and synthesis using standard HDL tools.

To run tests

% cabal configure -fall
% cabal build
% cd tests
% make test	   	-- use 'make test ARGS=--gensim' if you want to generate VHDL
% make simulate	-- [optional] if you want to test the VHDL using modelsim
% make report		-- generate test report