clash-lib: CAES Language for Synchronous Hardware - As a Library

[ bsd2, hardware, library ] [ Propose Tags ]

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

This package provides:

Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:

Prelude library: https://hackage.haskell.org/package/clash-prelude


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Change log CHANGELOG.md
Dependencies aeson (>=0.6.2.0 && <1.6), ansi-terminal (>=0.8.0.0 && <0.12), attoparsec (>=0.10.4.0 && <0.15), base (>=4.11 && <5), binary (>=0.8.5 && <0.11), bytestring (>=0.10.0.2 && <0.12), clash-prelude (==1.2.5), concurrent-supply (>=0.1.7 && <0.2), containers (>=0.5.0.0 && <0.7), data-binary-ieee754 (>=0.4.4 && <0.6), data-default (==0.7.*), deepseq (>=1.3.0.2 && <1.5), directory (>=1.2.0.1 && <1.4), dlist (>=0.8 && <1.1), errors (>=1.4.2 && <2.4), exceptions (>=0.8.3 && <0.11.0), extra (>=1.6.18 && <1.8), filepath (>=1.3.0.1 && <1.5), ghc (>=8.4.0 && <8.11), ghc-boot-th, hashable (>=1.2.1.0 && <1.4), haskell-src-meta (==0.8.*), hint (>=0.7 && <0.10), integer-gmp (==1.0.*), interpolate (>=0.2.0 && <1.0), lens (>=4.10 && <4.20), mtl (>=2.1.2 && <2.3), ordered-containers (==0.2.*), parsers (>=0.12.8 && <1.0), prettyprinter (>=1.2.0.1 && <2.0), primitive (>=0.5.0.1 && <1.0), process (>=1.1.0.2 && <1.7), reducers (>=3.12.2 && <4.0), template-haskell (>=2.8.0.0 && <2.17), temporary (>=1.2.1 && <1.4), terminal-size (==0.3.*), text (>=1.2.2 && <1.3), text-show (>=3.7 && <3.10), time (>=1.4.0.1 && <1.12), transformers (>=0.5.2.0 && <0.6), trifecta (>=1.7.1.1 && <2.2), unordered-containers (>=0.2.3.3 && <0.3), utf8-string (>=1.0.1 && <1.1), vector (>=0.11 && <1.0), vector-binary-instances (>=0.2.3.5 && <0.3) [details]
License BSD-2-Clause
Copyright Copyright © 2012-2016, University of Twente, 2016-2019, Myrtle Software Ltd, 2017-2019, QBayLogic B.V., Google Inc.
Author The Clash Authors
Maintainer QBayLogic B.V. <devops@qbaylogic.com>
Revised Revision 1 made by QBayLogic at 2021-03-23T13:36:32Z
Category Hardware
Home page https://clash-lang.org/
Bug tracker https://github.com/clash-lang/clash-compiler/issues
Source repo head: git clone https://github.com/clash-lang/clash-compiler.git(clash-lib)
Uploaded by QBayLogic at 2020-11-09T17:55:51Z
Distributions Arch:1.4.2, LTSHaskell:1.4.3, NixOS:1.4.3, Stackage:1.4.3
Downloads 48765 total (197 in the last 30 days)
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Readme for clash-lib-1.2.5

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clash-lib - Clash compiler, as a library

  • See the LICENSE file for license and copyright details

Clash - A functional hardware description language

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

  • Strongly typed (like VHDL), yet with a very high degree of type inference, enabling both safe and fast prototying using consise descriptions (like Verilog).

  • Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.

  • Higher-order functions, with type inference, result in designs that are fully parametric by default.

  • Synchronous sequential circuit design based on streams of values, called Signals, lead to natural descriptions of feedback loops.

  • Support for multiple clock domains, with type safe clock domain crossing.

Support

For updates and questions join the mailing list clash-language+subscribe@googlegroups.com or read the forum